Character recognition device

Claim 2

An improved character recognition device of the type including scanning means for scanning characters to be recognized, a shift register with storage cells, means for storing information signals derived from the scanning means into the shift register, and a character recognition circuit coupled to predetermined storage cells of the shift register and producing an output signal each time the pattern of information signals in the shift register corresponds to the scanning of the associated character to be recognized, wherein the improvement comprises a plurality of detection circuits, inputs of which are coupled to said shift register and each adapted to detect a distinct feature related to said pattern of information signals in said shift register and to subsequently produce a corresponding decision signal, the outputs of said detection circuits being connected to said character recognition circuit which effects the recognition of said pattern upon the receipt of a said decision signal, wherein a first one of said detection circuits includes a first circuit part to detect the presence of predetermined patterns of information signals in said shift register and to produce at its output one or more pattern signals upon the detection of such a predetermined pattern, and a second circuit part to generate at its output a first decision signal a first predetermined time interval after one of said pattern signals has been produced, and wherein said outputs of said first and second circuit parts are coupled to said character recognition circuit in order to feed said pattern signals and said first decision signal thereto respectively, said second circuit being adapted to generate said first decision signal said first predetermined time interval after the occurrence of a said pattern signal on condition that no other pattern signal is Produced within said first time interval and after a second time interval thereof has elapsed.

Claim 3

The character recognition device according to claim 1 further including exclusion means for preventing other decision signals from being generated upon a detection circuit having produced such a decision signal.

Claim 4

The character recognition device according to claim 1 wherein the decision signals produced by said detection circuits are normally substantially in time coincidence with each other.

Claim 5

The character recognition device according to claim 1 wherein the outputs of said detection circuits are intercoupled to form a common output which is connected to said character recognition circuit.

Claim 6

The character recognition device according to claim 1 wherein said second circuit part includes first inhibiting means for preventing a pattern signal occurring less than said second time interval after another pattern signal from giving rise to a said first decision signal.

Claim 7

The character recognition device according to claim 5 wherein said second circuit part includes a first bistable device, a first monostable device constituting said inhibiting means with a timing equal to said second time interval, a first timing circuit adapted to produce an output signal after its input has been activated for a third time interval equal to the difference between said first and second time intervals, and a first AND-gate, wherein said pattern pulses are fed to the 1-inputs of said first bistable and monostable devices, the respective 1-and 0-outputs of which are connected to said first AND-gate, and wherein the output of said first AND-gate is connected to the input of said first timing circuit, the output of which constitutes the output of said first detection circuit.

Claim 8

The character recognition device according to claim 6 wherein said common output of said detection circuits is connected to the 0-output of said first bistable device.

Claim 9

An improved character recognition device of the type including scanning means for scanning characters to be recognized, a shift register with storage cells, means for storing information signals derived from the scanning means into the shift register, and a character recognition circuit coupled to predetermined storage cells of the shift register and producing an output signal each time the pattern of information signals in the shift register corresponds to the scanning of the associated character to be recognized, wherein the improvement comprises a plurality of detection circuits, inputs of which are coupled to said shift register and each adapted to detect a distinct feature related to said pattern of information signals in said shift register and to subsequently produce a corresponding decision signal, the outputs of said detection circuits being connected to said character recognition circuit which effects the recognition of said pattern upon the receipt of a said decision signal, wherein a first one of said detection circuits includes a first circuit part to detect the presence of predetermined patterns of information signals in said shift register and to produce at its output one or more pattern signals upon the detection of such a predetermined pattern, and a second circuit part to generate at its output a first decision signal a first predetermined time interval after one of said pattern signals has been produced, and wherein said output of said first and second circuit parts are coupled to said character recognition circuit in order to feed said pattern signals and said first decision signal thereto respectively, said second circuit part including second inhibiting second means operated by each of said decision signals and preventing a first decision signal from being generated a predetermined fourth time interval after the occurrence of one of said decision signals.

Claim 10

An improved character recognition device of the type including scanning means for scanning characters to be recognized, a shift register with storage cells, means for storing information signals derived from the scanning means into the shift register, and a character recognition circuit coupled to predetermined storage cells of the shift register and producing an output signal each time the pattern of information signals in the shift register corresponds to the scanning of the associated character to be recognized, wherein the improvement comprises a plurality of detection circuits, inputs of which are coupled to said shift register and each adapted to detect a distinct feature related to said pattern of information signals in said shift register and to subsequently produce a corresponding decision signal, the outputs of said detection circuits being connected to said character recognition circuit which effects the recognition of said pattern upon the receipt of a said decision signal, wherein a first one of said detection circuits includes a first circuit part to detect the presence of predetermined patterns of information signals in said shift register and to produce at its output one or more pattern signals upon the detection of such a predetermined pattern, and a second circuit part to generate at its output a first decision signal a first predetermined time interval after one of said pattern signals has been produced, and wherein said output of said first and second circuit parts are coupled to said character recognition circuit in order to feed said pattern signals and said first decision signal thereto respectively, said second circuit part including second inhibiting second means operated by each of said decision signals and preventing a first decision signal from being generated a predetermined fourth time interval after the occurrence of one of said decision signals.

Claim 11

The character recognition device according to claim 8 wherein the sum of said first and fourth time intervals is smaller than thE minimum possible time interval elapsing between the occurrence of two pattern signals related to immediately following character patterns and giving rise each to a decision signal.

Claim 12

The character recognition device according to claim 8 wherein said second inhibiting means includes a second monostable device having a timing equal to said fourth time interval and a 1-input coupled to said common output of said detection circuits, and wherein said pattern signals are fed to said first monostable and bistable devices via a second AND-gate which is controlled by the 0-output of said second monostable device.

Claim 13

An improved character recognition device of the type including scanning means for scanning characters to be recognized, a shift register with storage cells, means for storing information signals derived from the scanning means into the shift register, and a character recognition circuit coupled to predetermined storage cells of the shift register and producing an output signal each time the pattern of information signals in the shift register corresponds to the scanning of the associated character to be recognized, wherein the improvement comprises a plurality of detection circuits, inputs of which are coupled to said shift register and each adapted to detect a distinct feature related to said pattern of information signals in said shift register and to subsequently produce a corresponding signal, the outputs of said detection circuits being connected to said character recognition circuit which effects the recognition of said pattern upon the receipt of a said decision signal, wherein a second of said detection circuits is adapted to detect the end of a character pattern stored by means of information signals in said shift register and to subsequently produce at its output a second decision signal after such detection, and wherein said second detection circuit includes a first registering means to register the occurrence in a predetermined first storage cell of said shift register of an information signal representing a black or substantially black portion of a character pattern stored in said shift register, said second detection circuit being adapted to generate a said second decision signal a predetermined fifth time interval after the beginning in said predetermined storage cell of a series of information signals representing a white or substantially white portion or space of said character pattern and on condition that said series has a predetermined minimum duration and on the further condition that said registering means have been operated and remain operated during said minimum duration.

Claim 14

An improved character recognition device of the type including scanning means for scanning characters to be recognized, a shift register with storage cells, means for storing information signals derived from the scanning means into the shift register, and a character recognition circuit coupled to predetermined storage cells of the shift register and producing an output signal each time the pattern of information signals in the shift register corresponds to the scanning of the associated character to be recognized, wherein the improvement comprises a plurality of detection circuits, inputs of which are coupled to said shift register and each adapted to detect a distinct feature related to said pattern of information signals in said shift register and to subsequently produce a corresponding signal, the outputs of said detection circuits being connected to said character recognition circuit which effects the recognition of said pattern upon the receipt of a said decision signal, wherein a second of said detection circuits is adapted to detect the end of a character pattern stored by means of information signals in said shift register and to subsequently produce at its output a second decision signal after such detection, and wherein said second detection circuit includes a first registering means to register the occurrence in a predetermined first storage cell of said shift register of an information signal representing a black or substantially black portion of a character pattern stored in said shift register, said second detection circuit being adapted to generate a said second decision signal a predetermined fifth time interval after the beginning in said predetermined storage cell of a series of information signals representing a white or substantially white portion or space of said character pattern and on condition that said series has a predetermined minimum duration and on the further condition that said registering means have been operated and remain operated during said minimum duration.

Claim 15

The character recognition device according to claim 11 wherein said predetermined minimum duration is equal to a sixth time interval which is smaller than said fifth time interval.

Claim 16

The character recognition device according to claim 11 wherein said predetermined first storage cell and said fifth time interval are such that said second decision signal normally occurs in time coincidence with said first decision signal.

Claim 17

The character recognition device according to claim 11 wherein said second detection circuit includes a second bistable device constituting said first registering means, a third bistable device, a second and a third timing circuit adapted to produce an output signal after their input has been activated for said sixth time interval and for a seventh time interval equal to the difference between said fifth and sixth time intervals respectively, and a third AND-gate wherein one output of said predetermined storage cell of said shift register is coupled to the 1-input of said second bistable device, the 1-output of which controls said third AND-gate which is also controlled by the inverse of said one output of said predetermined cell, wherein the output of said third AND-gate is coupled to the input of said second timing circuit, the output of which is coupled to the 1-input of said third bistable deviCe, and wherein the 1-output of said third bistable device is coupled to the input of said third timing circuit, the output of which constitutes said output of said second detection circuit.

Claim 18

The character recognition device according to claim 14 wherein said one output of said predetermined first cell is connected to the 1-input of said second bistable device via a fourth AND-gate which is controlled by said common output of said detection circuits via an inverter.

Claim 19

The character recognition device according to claim 14 wherein said common output of said detection circuits is connected to the 0-inputs of said second and third bistable devices respectively.

Claim 20

An improved character recognition device of the type including scanning means for scanning characters to be recognized, a shift register with storage cells, means for storing information signals derived from the scanning means into the shift register, and a character recognition circuit coupled to predetermined storage cells of the shift register and producing an output signal each time the pattern of information signals in the shift register corresponds to the scanning of the associated character to be recognized, wherein the improvement comprises a plurality of detection circuits, inputs of which are coupled to said shift register and each adapted to detect a distinct feature related to said pattern of information signals in said shift register and to subsequently produce a corresponding decision signal, the outputs of said detection circuits being connected to said character recognition circuit which effects the recognition of said pattern upon the receipt of a said decision signal, wherein a third of said detection circuits is adapted to detect the beginning of a character pattern stored by means of information signals in said shift register and to produce at its output a third decision signal after such detection, and wherein said third detection circuit includes a second registering means to register the occurrence in a predetermined second storage cell of said shift register of an information signal representing a black or substantially black portion of a character pattern stored in said shift register, said third detection circuit being adapted to generate a said third decision signal at least a predetermined eighth time interval after said second registering means have been operated and on condition that said second registering means remain operated during a ninth time interval which is smaller than said eighth time interval.

Claim 21

An improved character recognition device of the type including scanning means for scanning characters to be recognized, a shift register with storage cells, means for storing information signals derived from the scanning means into the shift register, and a character recognition circuit coupled to predetermined storage cells of the shift register and producing an output signal each time the pattern of information signals in the shift register corresponds to the scanning of the associated character to be recognized, wherein the improvement comprises a plurality of detection circuits, inputs of which are coupled to said shift register and each adapted to detect a distinct feature related to said pattern of information signals in said shift register and to subsequently produce a corresponding decision signal, the outputs of said detection circuits being connected to said character recognition circuit which effects the recognition of said pattern upon the receipt of a said decision signal, wherein a third of said detection circuits is adapted to detect the beginning of a character pattern stored by means of information signals in said shift register and to produce at its output a third decision signal after such detection, and wherein said third detection circuit includes a second registering means to register the occurrence in a predetermined second storage cell of said shift register of an information signal representing a black or substantially black portion of a character pattern stored in said shift register, said third detection circuit being adapted to generate a said third decision signal at least a predetermined eighth time interval after said second registering means have been operated and on condition that said second registering means remain operated during a ninth time interval which is smaller than said eighth time interval.

Claim 22

The character recognition device according to claim 17 wherein said third detection circuit includes third inhibiting means preventing the operation of said third timing circuit during a predetermined tenth time interval after the occurrence of a said decision signal.

Claim 23

The character recognition device according to claim 18 wherein said predetermined first and second storage cells are the same, and said third detection circuit includes said second and third bistable devices, said third timing circuit, said fourth AND-gate, a first AND-gate, a third monostable device, and a fourth timing circuit adapted to produce an output signal after its input has been activated for said ninth time interval, wherein the 1-output of said second bistable device is coupled to the input of said fourth timing circuit via said first AND-gate which is also controlled by the )-output of said third monostable device forming part of said third inhibiting means and having a time constant equal to said tenth time interval, and wherein the output of said third timing circuit is coupled to the 1-input of said third bistable device.

Claim 24

The character recognition device according to claim 17 wherein said predetermined second storage cell and said eighth time interval are such that said third decision signal normally occurs in time coincidence with said first decision signal.

Claim 25

The character recognition device according to claim 17 wherein tHe sum of said eighth and ninth time intervals is equal to the period at which the characters to be recognized are fed to the recognition device.