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US3770968A Expired / Lapsed US ⏱️ 0.0 years remaining

Field effect transistor detector amplifier cell and circuit for low level light signals

Assignee: International Business Machines Corp
•
Filing: 1972-02-24
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Granted: 1973-11-06
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Expires: 1992-02-24
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Abstract

Abstract A light sensitive element, typically a phototransistor, diode or the like, is suitably coupled to a load element, typically an FET device suitably biased as a linear load. An output circuit including a high input impedance element, typically an FET inverter, is coupled between the linear load and the diode. Little or no current flows in the input circuit in the absence of light applied to the light sensitive element. When light is applied current flows through the light sensitive element and modulates current flow through the inverter. The output circuit has high sensitivity to low level light signals by reason of the linear load and the absence of ''''Johnson'''' or thermal noise. A suitable connection between the light sensitive element and the load element sets the output circuit in a threshold state for immediate response to light signals. Connecting the inverter output to suitable circuitry, i.e., amplifiers, differential amplifiers, level shifters and the like, provides an analog or digital output sensitive to extremely low light levels.

Inventors

  • 👤 J Hession
  • 👤 H Klepp

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 20:14
CPC Classifications
H; H04; H04N; H04N25/00; H04N25/50; H04N25/57; H04N25/571; H04N25/573; H03; H03F; H03F3/00; H03F3/04; H03F3/08; H03F3/082; H03K; H03K17/00; H03K17/51; H03K17/78; H03K17/785; H10; H10F; H10F39/00; H10F39/10; H10F39/103

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 68 words
An integrated opto-electronic circuit comprising: a. a light sensitive element, b. an FET of one type as a linear load element, c. an FET of said one type as a buffer amplIfier connected between the linear load and the light sensitive element, d. and an output circuit including an FET of said one type as a high input impedance element connected to the buffer amplifier and linear load.
Claim 2
Dependent Claim 68 words
An integrated opto-electronic circuit comprising: a. a light sensitive element, b. an FET of one type as a linear load element, c. an FET of said one type as a buffer amplIfier connected between the linear load and the light sensitive element, d. and an output circuit including an FET of said one type as a high input impedance element connected to the buffer amplifier and linear load.
Claim 3
Dependent Claim 32 words
The circuit of claim 1 wherein the buffer amplifier is biased for threshold operation by the light sensitive element and provides an output voltage that biases the load element for threshold operation.
Claim 4
Dependent Claim 133 words
An integrated opto-electronic circuit comprising: a. a light sensitive element, b. an FET of one type as a linear load, c. an FET of said one type as a buffer amplifier connected between the linear load and the light sensitive element, d. the buffer amplifier being biased for threshold operation by the light sensitive element and providing an output voltage that biases the load element for threshold operation, e. an output circuit including an FET of said one type as a high impedance element connected to the buffer amplifier and linear load, f. a second amplifier coupled to the high impedance amplifier, the second amplifier and high impedance amplifier connected as a differential amplifier and providing an output voltage change directly proportional to any quantity of light incident on the light sensitive element.
Claim 5
Dependent Claim 133 words
An integrated opto-electronic circuit comprising: a. a light sensitive element, b. an FET of one type as a linear load, c. an FET of said one type as a buffer amplifier connected between the linear load and the light sensitive element, d. the buffer amplifier being biased for threshold operation by the light sensitive element and providing an output voltage that biases the load element for threshold operation, e. an output circuit including an FET of said one type as a high impedance element connected to the buffer amplifier and linear load, f. a second amplifier coupled to the high impedance amplifier, the second amplifier and high impedance amplifier connected as a differential amplifier and providing an output voltage change directly proportional to any quantity of light incident on the light sensitive element.
Claim 6
Dependent Claim 135 words
The circuit of claim 1 comprising an integrated opto-electronic circuit comprising: a. a semiconductor substrate, b. a light sensitive element formed in the substrate as an active device, c. first, second and third field effect transistors formed in a substrate as active devices, d. an insulating layer formed on the substrate and covering all active devices, the layer including openings to the devices, e. and metallization deposited on the layer and in the contact openings to connect the devices in said circuit, so that the circuit when biased causes the buffer and linear load amplifiers to be at a threshold and without thermal noise, such that when light is present, the high input impedance amplifier will change state and provide an output signal that is proportional to the light incident on the light sensitive element.

References Cited (Backward Citations)

US3308276A Cited
US3333106A Cited
US3535532A Cited
US3390273A Cited
US3463928A Cited
US3516004A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-11-05 1977-05-07 1977-11-06 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-11-05 1981-05-07 1981-11-06 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-11-05 1985-05-07 1985-11-06 $7700.00 Window Closed / Lapsed

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