Field effect transistor detector amplifier cell and circuit providing a digital output and/or independent of background

Claim 2

An opto-electronic circuit comprising: a. a light sensitive element, an FET of one type buffer amplifier connected to the light sensitive element and a circuit node, b. an FET of one type as a linear load element connected to the node, c. an FET of said one type as a high input impedance level shifter connected to the node, d. an output circuit including a terminal, e. and at least one inverter amplifier circuit connected between the level shifter and the output circuit to set the terminal between two voltage levels depending upon the presence or absence of light incident on the light sensitive element.

Claim 3

The circuit of claim 1 wherein the high input impedance level shifter comprises first and second FET amplifiers connected in series and having an output at the common connection between the amplifiers.

Claim 4

The circuit of claim 2 wherein the inverter amplifier circuit comprises at least two FET amplifiers connected in series, an input circuit connected to one amplifier and an output at the common connection between the amplifiers.

Claim 5

The circuit of claim 3 wherein the output circuit comprises at least two FET amplifiers connected in series, an input circuit connected to one amplifier and having the terminal connected to the common connection between the amplifiers.

Claim 6

The circuit of claim 4 wherein the level shifter is adapted to lower the voltage level at the node to the bias voltage level for the connected inverter amplifier.

Claim 7

The circuit of claim 5 wherein a second inverter amplifier and second level shifter are connected in cascade between the output circuit and the first inverter amplifier, the second level shifter adapted to lower the output voltage at the first inverter amplifier to the bias voltage level for the output circuit.

Claim 8

An opto-electronic circuit comprising: a. a light sensitive element, an FET of one type buffer amplifier connected to the light sensitive element and a circuit node, b. an FET of said one type as a linear load element connected to the light sensitive element at the node, c. an FET of one type as a high impedance level shifter connected to the node, d. first and second output circuits, e. and at least one inverter-amplifier connected between the level shifter and one output circuit, the level shifter and inverter adapted to cause current to flow in one output circuit when a decrease occurs in light incident on the light sensitive element and to terminate when an increase occurs in the light incident on the light sensitive sensitive which causes current to flow in the second output circuit.

Claim 9

An opto-electronic circuit comprising: a. a light sensitive element, an FET of one type buffer amplifier connected to the light sensitive element and a circuit node, b. an FET of said one type as a linear load element connected to the light sensitive element at the node, c. an FET of one type as a high impedance level shifter connected to the node, d. first and second output circuits, e. and at least one inverter-amplifier connected between the level shifter and one output circuit, the level shifter and inverter adapted to cause current to flow in one output circuit when a decrease occurs in light incident on the light sensitive element and to terminate when an increase occurs in the light incident on the light sensitive sensitive which causes current to flow in the second output circuit.

Claim 10

The circuit of claim 7 further including storage elements adapted to reduce standby current through the output circuits when the light sensitive element is not subject to sudden changes in light.

Claim 11

The circuit of claim 8 wherein each output circuit includes an amplifier element, the amplifiers being biased to follow the background light incident on the light sensitive element and conducting for sudden changes in light.

Claim 12

The circuit of claim 9 wherein each output circuit has an amplifying element connected to an energy storage device, one output circuit being connected to the inverter-amplifier and the other output circuit being connected to the level shifter.

Claim 13

An integrated opto-electronic circuit comprising: a. a semiconductor substrate, b. a light sensitive element formed in the substrate of an active device, c. a first amplifying element formed in the substrate as an active device to serve the light sensitive element as a linear load, d. at least second and third amplifying elements formed in the substrate as active devices to serve the first amplifying elements as a high input impedance voltage level shifter, e. at least fourth and fifth amplifying elements formed in the substrate as active elements to serve the voltage level shifter and a polarity shifter, f. at least six and seventh amplifying elements together with at least two storage elements formed in the substrate as active and passive devices, respectively, to serve the level shifter and polarity shifter as output circuitS, g. an insulating layer formed on the substrate and covering all active and passive devices, the layer including openings to the active and passive devices, h. and metallization deposited on the layer and in the contact openings to connect the devices in an electric circuit, that when biased, causes the first amplifier to be at a threshold and without thermal noise, such that when light is present, the output circuit will follow the background and provide an output signal that is analogous to sudden increases and decreases in the light incident on the photosensitive element.

Claim 14

An integrated opto-electronic circuit comprising: a. a semiconductor substrate, b. a light sensitive element formed in the substrate of an active device, c. a first amplifying element formed in the substrate as an active device to serve the light sensitive element as a linear load, d. at least second and third amplifying elements formed in the substrate as active devices to serve the first amplifying elements as a high input impedance voltage level shifter, e. at least fourth and fifth amplifying elements formed in the substrate as active elements to serve the voltage level shifter and a polarity shifter, f. at least six and seventh amplifying elements together with at least two storage elements formed in the substrate as active and passive devices, respectively, to serve the level shifter and polarity shifter as output circuitS, g. an insulating layer formed on the substrate and covering all active and passive devices, the layer including openings to the active and passive devices, h. and metallization deposited on the layer and in the contact openings to connect the devices in an electric circuit, that when biased, causes the first amplifier to be at a threshold and without thermal noise, such that when light is present, the output circuit will follow the background and provide an output signal that is analogous to sudden increases and decreases in the light incident on the photosensitive element.