US3769580A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Delay line attenuation tester
Assignee: Unisys Corp
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Filing: 1972-08-14
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Granted: 1973-10-30
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Expires: 1992-08-14
Abstract
Abstract An electronic circuit for measuring the attenuation of a signal through delay lines. The attenuation measurements are accomplished by converting the output signals from the delay lines to direct current voltages which equal the peak-to-peak amplitude of the output signals. These direct current voltages are then compared electronically to a precision reference voltage which equals the peak-to-peak amplitude of the input signal to the delay lines. Direct measurements are then taken of the attenuation of the output signal by reading the direct current voltages. Additional circuitry is provided to make a pass-fail decision automatically where certain limits have been established for the attenuation of the delay line output signals.
Inventors
- 👤 D Black
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 20:41
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/22; G01R19/04; G01R27/00; G01R27/28
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
156 words
A delay line tester for measuring the voltage attenuation of a plurality of delay line circuits comprising: means for reproducing the output signal from each delay line; converting means for converting each of said reproduced delay line output signals into rectified components; means to correct for any voltage drop across said converting means; summing means for adding together said rectified components of each of said delay line output signals into a voltage that is equal to the peak-to-peak amplitude of the delay line output signals; first comparator means for comparing said voltages representing the peak-to-peak amplitude of each of the delay line output signals with a voltage representative of the peak-to-peak amplitude of the input signal to said delay line; and second comparator means for comparing said voltages representing the peak-to-peak amplitude of the output signal of each delay line with the voltages representing the peak-to-peak amplitude of the output signals of the other delay lines.
Claim 2
Dependent Claim
156 words
A delay line tester for measuring the voltage attenuation of a plurality of delay line circuits comprising: means for reproducing the output signal from each delay line; converting means for converting each of said reproduced delay line output signals into rectified components; means to correct for any voltage drop across said converting means; summing means for adding together said rectified components of each of said delay line output signals into a voltage that is equal to the peak-to-peak amplitude of the delay line output signals; first comparator means for comparing said voltages representing the peak-to-peak amplitude of each of the delay line output signals with a voltage representative of the peak-to-peak amplitude of the input signal to said delay line; and second comparator means for comparing said voltages representing the peak-to-peak amplitude of the output signal of each delay line with the voltages representing the peak-to-peak amplitude of the output signals of the other delay lines.
Claim 3
Dependent Claim
161 words
An electronic test means for determining the attenuation of a signal through one or more delay lines comprising: means for simulating the impedance load to equal that of the ultimate application of each delay line; means for precise reproduction of the output signal of each of said delay lines; means for converting said reproduction of each delay line output signal into its direct current components; voltage correction means to compensate For any loss in said direct current components in said converting means; summing means for combining each of said direct current components into a voltage representing the peak-to-peak output signal of said delay lines; first comparator means for comparing each of said voltages representing said delay line output signals to a direct current potential representing a delay line input signal; second comparator means for comparing said voltages representing said output signals to one another; and indicator means responding to predetermined settings of said first comparator means and said second comparator means.
Claim 4
Dependent Claim
161 words
An electronic test means for determining the attenuation of a signal through one or more delay lines comprising: means for simulating the impedance load to equal that of the ultimate application of each delay line; means for precise reproduction of the output signal of each of said delay lines; means for converting said reproduction of each delay line output signal into its direct current components; voltage correction means to compensate For any loss in said direct current components in said converting means; summing means for combining each of said direct current components into a voltage representing the peak-to-peak output signal of said delay lines; first comparator means for comparing each of said voltages representing said delay line output signals to a direct current potential representing a delay line input signal; second comparator means for comparing said voltages representing said output signals to one another; and indicator means responding to predetermined settings of said first comparator means and said second comparator means.
Claim 5
Dependent Claim
27 words
An electronic test means as defined in claim 2 wherein said means for converting said reproduction of each of said delay line signals comprises a rectifier-filter circuit.
Claim 6
Dependent Claim
47 words
An electronic test means as defined in claim 2 wherein said voltage correction means comprises the combination of an adjustable voltage source to provide a compensating voltage; and a differential amplifier to combine said compensating voltage with said direct current component of said delay line output signals.
Claim 7
Dependent Claim
17 words
An electronic test means as defined in claim 2 wherein said summing means comprises a differential amplifier.
Claim 8
Dependent Claim
42 words
An electronic test means as defined in claim 2 wherein said first comparator means comprises: an adjustable voltage source; and a differential amplifier to compare the voltage from said adjustable source to said voltage representing the output signals of said delay line.
Claim 9
Dependent Claim
78 words
An electronic test means as defined in claim 6 wherein said second comparator means comprises: a differential amplifier for each pair of said voltages representing said output signal of said delay line to produce a difference voltage representing the difference between said pair of voltages; an adjustable source of positive voltage; an adjustable source of negative voltage; means for comparing said differential voltage with said positive voltage; and means for comparing said differential voltage with said negative voltage.
References Cited (Backward Citations)
US2476992A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-10-29 | 1977-04-30 | 1977-10-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-10-29 | 1981-04-30 | 1981-10-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-10-29 | 1985-04-30 | 1985-10-30 | $7700.00 | Window Closed / Lapsed |