Narrow band television system

Claim 2

A transmitting system for selectively transmitting signals representative of individual elements of a succession of pictures in a first wide-band television for transmission in a second frequency band narrower than the first, comprising: a. a source of first wide-band television signals comprising video signals representative of picture elements, horizontal synchronizing signals, and vertical synchronizing signals; b. a source of sampling oscillations of a sampling frequency which is a multiple by an integer M of the frequency of the horizontal synchronizing signals and is harmonically related in frequency and phase therewith, connected to c. dividing means to divide the sampling oscillations by the integer M and thus produce as its quotient output oscillations of the frequency of the horizontal synchronizing signals; d. delay means connected to the source of sampling oscillations to delay the said oscillations by a time delay less than their period and alterable to any of N discrete values, and apply the delayed oscillations to open, e. a video sampling gate connected to pass a sample of the video signals of the first wide-band television signals to a f. holding circuit for storing the said sample; g. sampling counter means connected to receive the quotient output of the dividing means (c) and, responsively thereto, to alter the time delay produced by the delay means (d); h. reset pulse generator means connected to receive the vertical synchronizing signals and, responsively thereto, to produce as an output reset signals whose period is an integral multiple of FN times the period of the vertical synchronizing signals, where F is the number of fields per frame in the first wideband signals, and to transmit such reset signals to the sampling counter means (g) to reset that means to a reference condition, and to i. output terminal means for the reset signals, for the sample signal stored in holding circuit (f) and for the horizontal synchronizing and vertical synchronizing signals.

Claim 3

The system claimed in claim 1 further comprising j. mixer means to mix the reset signals with the sample signal stored in holding circuit (f), and with the horizontal synchronizing and vertical synchronizing signals, and to transmit the signals thus mixed to the said output terminals means (i).

Claim 4

The system claimed in claim 1 in which the reset pulse generator means (h) is connected to provide counter reversing signals of frequency an integral multiple of the frequency of the reset signals and to feed such counter reversing signals to k. counter reversing means connected to the sampling counter means (g) to reverse the direction of its count responsively to the counter reversing signals.

Claim 5

The system claimed in claim 3 in which the frequency of the counter reversing signals is twice the frequency of the reset signals.

Claim 6

The system claimed in claim 3 in which the therein said counter reversing means (k) comprises: up-down binary counter means connected to receive the therein said counter reversing signals and to alter its state responsively thereto, connected to counter control means connected to receive the quotient output of the dividing means (c) recited in claim 1 and, responsively to the state of the up-down binary counter means, to transmit the said quotient output alternatively to a first input terminal and to a second input terminal of the sampling counter means (g), and the sampling counter means (g) is so constructed as to count increasingly signals applied to a first input terminal with which it is provided, and to count decreasingly signals applied to a second input terminal with which it is provided.

Claim 7

The system claimed in claim 1 in which the therein said delay means (d) comprises a tapped delay line, the therein said alterable delay is altered by altering connections thereto.

Claim 8

The system claimed in claim 1 in which the therein said delay means (d) comprises: A multiplexer having a common terminal connected to the source of sampling oscillations (b), having a plurality of selectible terminals; and having a plurality of control terminals for the application of signals determinative which selectible terminal is selected to be connected to the common terminal; a delay line having a plurality of equally spaced taps, each of which is connected to a selectible terminal of the multiplexer, and a common terminal which is connected to the video sampling gate (e); and the therein said sampling counter means (g) comprises a multistage binary counter whose stage outputs are so connected to control terminals of the multiplexer that the state of the said multistage binary counter determines which one of the selectible terminals of the multiplexer is selected to be connected to the common terminal of the multiplexer.

Claim 9

A receiving system for receiving transmitted signals comprising selectively sampled signals representative of individual elements of a succession of pictures, mixed with horizontal and vertical synchronizing signals and reset signals, such as are transmitted by the transmitting system claimed in claim 1, and presenting a visual representation of the said pictures, comprising: a. a source of the said transmitted signals; b. a source of sampling oscillations of a sampling frequency which is the same as the sampling frequency employed in the system for transmitting the said transmitted signals, and is harmonically related in frequency and phase with the horizontal synchronizing signals comprised in the transmitted signals; c. dividing means connected to the source of sampling oscillations (b) to divide their frequency by its ratio to the frequency of the horizontal synchronizing signals in the transmitted signals and thus produce as its quotient output oscillations of the frequency of the said horizontal synchronizing signals; d. delay means connected to the source of sampling oscillations to delay them by a first time delay less than their period, and by a second alterable time delay less than their period and to apply the thus doubly delayed oscillations to open e. video sampling gate means connected to receive the said selectively sampled signals and to pass as an output a time-selected part thereof for transmission to picture reproducing means scanned at a speed compatible with the duration of the time-selected part; f. sampling counter means connected to receive the quotient output of the dividing means (c) and, responsively thereto, to alter the second time delay means produced by the delay means (d) in the predetermined sequence employed in selectively sampling the transmitted signals; g. frame synchronizing means connected to receive reset signals from the source recited in (a) hereof and, responsively thereto, to produce as an output frame synchronizing signals and to apply them to the sampling counter means (f) to reset that means to a reference condition; h. connecting means connected to receive the output of video sampling gate means (e) and the vertical and horizontal synchronizing signals, and transmit them to scanned picture reproducing means.

Claim 10

The system claimed in claim 8, in which the therein said connecting means (h) comprises means to mix the output of the video sampling gate means (e) and the vertical and horizontal synchronizing signals, and transmit the thus mixed signals to scanned picture reproducing means.

Claim 11

The system claimed in claim 8 further comprising: i. scanned picture reproducing means connected to receive the signals transmitted by therein said mixer means (h) and, responsively thereto, to scan at rates compatible with the vertical and horizontal synchronizing signals, and to display as picture elements in the raster produced by such scan the signals which are the output of the video sampling gate meanS (e).

Claim 12

The system claimed in claim 8 in which the therein said alterable delay is altered by altering connections to a tapped delay line.

Claim 13

The system claimed in claim 8 in which the therein said delay means (d) comprises a multiplexer whose common terminal is connected to the source of sampling oscillations (b), whose various selectible terminals are connected to equally spaced taps on a delay line whose common terminal is connected to the therein said video sampling gate means (e), and the therein said sampling counter means (f) comprises a multistage binary counter whose stage outputs are so connected to the control terminals of the multiplexer that the state of the said counter determines which one of the various selectible terminals is selected to be connected to the common terminal of the multiplexer.

Claim 14

The system claimed in claim 8 in which the vertical synchronizing signal from the therein said source (a) of transmitted signals is connected to provide counter reversing signals of frequency an integral multiple of the frequency of the frame reset signals and to feed such counter reversing signals to j. counter reversing means connected to the sampling counter to reverse the direction of its count responsibly to the counter reversing signals.

Claim 15

The system claimed in claim 13 in which the frequency of the counter reversing signals is twice the frequency of the frame synchronizing signals.

Claim 16

The system claimed in claim 13 in which the therein said counter reversing means (j) comprises: up-down binary counter means connected to receive the therein said counter reversing signals and alter its state responsively thereto, connected to counter control means connected to receive the quotient output of the dividing means (c) recited in claim 8, and, responsively to the state of the up-down binary counter means, to transmit the said quotient output alternatively to a first input terminal and to a second input terminal of the sampling counter means (f) the sampling counter means (f) being so constructed as to count increasingly signals applied to its first input terminal and to count decreasingly signals applied to its second input terminal.

Claim 17

The system claimed in claim 8 in which the therein said frame synchronizing means (g) comprises: a long vertical synchronizing signal shaper connected to receive the vertical synchronizing signal from the therein said source (a), which may contain serrations, and produce responsively thereto a signal without such serrations, connected to apply that signal to a frame synchronizing signal simulator which, responsively to the trailing edge thereof, produces a simulated frame synchronizing signal for every vertical synchronizing signal, the simulated frame synchronizing signal beginning only after the vertical synchronizing signal has ceased, connected to apply the simulate frame synchronizing signal to one input of a frame synchronizing signal gate, which is a two-input ''''AND'''' gate, whose other input is connected to receive the vertical synchronizing signals and the reset signals from the source (a) recited in claim 8, and whose output is the output frame synchronizing signals recited in recital (g) of claim 8.

Claim 18

The system claimed in claim 16 in which the output of the therein said frame synchronizing signal simulator is connected to a counter which is connected to periodically reverse the direction of counting of the sampling counter means recited in (f) of claim 8.