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US3768020A Expired / Lapsed US ⏱️ 0.0 years remaining

Group delay time correcting circuit including a toulon circuit for use in an intermediate-frequency amplifying circuit

Assignee: Sansui Electric Co Ltd
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Filing: 1971-12-29
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Granted: 1973-10-23
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Expires: 1991-12-29
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Abstract

Abstract A group delay time correcting circuit including a toulon circuit for use in an intermediate-frequency amplifying circuit. The intermediate-frequency amplifying circuit is comprised of an amplitude limiter, a group delay time correcting circuit and a detector circuit coupled to the output of the group delay time correcting circuit. The group delay time correcting circuit includes a differential amplifier for converting the input signals thereto from the amplitude limiter into two signals equal in amplitude but opposite in phase. The output of the differential amplifier is applied to a Toulon circuit comprised of a series connected reactance circuit and a resistor. The output of the Toulon circuit is taken at the junction between the reactance circuit and the resistor. The reactance circuit of the Toulon circuit is constructed so as to have at least one resonance point and one anti-resonance point.

Inventors

  • 👤 H Kurata

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 15:31
CPC Classifications
H; H03; H03H; H03H11/00; H03H11/02; H03H11/16; H03H11/20; H03D; H03D3/00; H03D3/001; H03F; H03F3/00; H03F3/189; H03F3/19; H03F3/191; H03F2203/00; H03F2203/45; H03F2203/45621

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 99 words
A group delay time correcting circuit for use in an intermediate-frequency amplifying circuit comprising: a. means for converting an input signal to two signals having the same amplitude but with a phase difference of 180* therebetween, b. means for applying one of said signals to one terminal of a series circuit comprised of a reactance circuit and a resistor, and the other signal to the other terminal, respectively, said reactance circuit having at least one resonance point and one anti-resonance point, and c. means for taking an output signal from the connecting point between said reactance circuit and resistor.
Claim 2
Dependent Claim 99 words
A group delay time correcting circuit for use in an intermediate-frequency amplifying circuit comprising: a. means for converting an input signal to two signals having the same amplitude but with a phase difference of 180* therebetween, b. means for applying one of said signals to one terminal of a series circuit comprised of a reactance circuit and a resistor, and the other signal to the other terminal, respectively, said reactance circuit having at least one resonance point and one anti-resonance point, and c. means for taking an output signal from the connecting point between said reactance circuit and resistor.
Claim 3
Dependent Claim 19 words
An intermediate-frequency amplifying circuit as specified in claim 1 wherein said means for converting includes a differential amplifier circuit.
Claim 4
Dependent Claim 58 words
An intermediate-frequency amplifying circuit as specified in claim 1 wherein said means for converting consists of a secondary winding of an intermediate-frequency transformer forming a part of said amplitude limiter, said secondary winding having a neutral terminal whereby said two signals are drawn out from across said neutral terminal and the two winding ends of said secondary winding.
Claim 5
Dependent Claim 40 words
An intermediate-frequency amplifying circuit as specified in claim 1 wherein said reactance circuit comprises one capacitor and at least one parallel circuit consisting of a capacitor and a reactor, said one capacitor and said parallel circuits being connecTed in series.
Claim 6
Dependent Claim 33 words
An intermediate-frequency amplifying circuit as specified in claim 4 wherein said reactance circuit comprises at least two series connected parallel circuits, each of said parallel circuits consisting of a capacitor and a reactor.

References Cited (Backward Citations)

US3177433A Cited
US3505603A Cited
US3525946A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-10-22 1977-04-23 1977-10-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-10-22 1981-04-23 1981-10-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-10-22 1985-04-23 1985-10-23 $7700.00 Window Closed / Lapsed

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