Abstract A switching transistor circuit for use, for example, in a switching mode regulator where the emitter-collector circuit of the transistor is coupled in a series circuit between the DC input line and the output to the load circuit, the output DC voltage level being a function of the duty cycle of the transistor, the turn-on and turn-off of the transistor being controlled by a control circuit coupled to the base of the transistor, a circuit being coupled to the base which, when operated, serves to sweep the charge from the transistor base region, and a differentiating circuit coupled across the transistor and operating at the time the voltage across the transistor starts to change when the transistor starts to turnoff to thereby enable said circuit to sweep the charge from the base region and hasten the fall time of the transistor.
Inventors
👤 R Crawford
Bibliographic Details
Application Number—
JurisdictionUS
Data Sourcegoogle_patents
Last Synchronized2026-10-24 06:22
CPC Classifications
H; H02; H02M; H02M1/00; H02M1/32
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
138 words
A switching transistor turn-off circuit for removing stored charge to decrease the fall time of a switching transistor, said circuit comprising: a switching transistor having its emitter-collector circuit in series between a supply and a load circuit; first circuit means coupled to the base of said switching transistor for turning said switching transistor on and off; second circuit means coupled to the base of said switching transistor for sweeping the stored charge out of the base region of said switching transistor to hasten the transistor fall time; and third circuit means coupled to said switching transistor for differentiating the voltage across said switching transistor, said third circuit means operating to render said second circuit means operative for sweeping the stored charge out of the base region of said switching transistor after said switching transistor comes out of saturation.
Claim 2
Dependent Claim
138 words
A switching transistor turn-off circuit for removing stored charge to decrease the fall time of a switching transistor, said circuit comprising: a switching transistor having its emitter-collector circuit in series between a supply and a load circuit; first circuit means coupled to the base of said switching transistor for turning said switching transistor on and off; second circuit means coupled to the base of said switching transistor for sweeping the stored charge out of the base region of said switching transistor to hasten the transistor fall time; and third circuit means coupled to said switching transistor for differentiating the voltage across said switching transistor, said third circuit means operating to render said second circuit means operative for sweeping the stored charge out of the base region of said switching transistor after said switching transistor comes out of saturation.
Claim 3
Dependent Claim
43 words
A switching transistor circuit as in claim 1 wherein said second circuit means comprises a control transistor with its emitter-collector circuit coupled across the base-emitter region of said switching transistor, the base of said control transistor being coupled to said third circuit means.
Claim 4
Dependent Claim
26 words
A switching transistor circuit as in claim 2 wherein said third circuit means comprises a capacitor-resistor network coupled across the emitter-collector circuit of said switching transistor.
Claim 5
Dependent Claim
32 words
A switching transistor circuit as in claim 3 including means coupled to said third circuit means for discharging a capacitor of said capacitor-resistor network after the rise time of said switching transistor.
Claim 6
Dependent Claim
47 words
A switching circuit as in claim 4 wherein said latter means comprises a diode, and including an additional circuit coupled to said third circuit means for discharging any charge remaining on said capacitor after initial discharge through said diode or said emitter-collector circuit of said control transistor.