US3764981A
Expired / Lapsed
US
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System for transmitting 1-bit information having priority level
Assignee: Hitachi Ltd
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Filing: 1971-11-09
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Granted: 1973-10-09
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Expires: 1991-11-09
Abstract
Abstract In a system comprising a central control room connected at one end of a bus, and a plurality of stations coupled to optional positions along the bus, whereby request signals from the respective stations are transmitted to the control room in the order of the height of the priority levels of the stations, an information transmission system is included wherein the stations are classified into l sets every m ones in the order of the height of the priority levels, while a time width in which the request signal is transmitted from each station to the bus is divided into two parts P1 and P2 continuous in time, so that level signals indicating the sets which are making request for starting may be transmitted every set of the m stations at the part P1, and that each station may transmit an order signal at the timing of P2 only when the level signal higher in priority than the set to which it belongs is not transmitted to the bus.
Inventors
- 👤 K Takasugi
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 11:59
CPC Classifications
H; H04; H04L; H04L12/00; H04L12/28; H04L12/42; H04L12/423; G; G06; G06F; G06F13/00; G06F13/14; G06F13/20; G06F13/24; G06F13/26; G06F13/36; G06F13/368; G06F13/374; H04L7/00; H04L7/04; H04L7/041; H04L7/044; H04L7/06
Claims Analysis
Total Claims: 22
Claim 1
Independent Claim
391 words
A system having a central control sector, a number of stations each including a 1-bit information source having a priority level, and means to couple said central control sector and said stations with a bus which consists of an address line for transmitting from said control sector to said respective stations a pulse train with clock signals of a fixed time interval included between reoccurrence pulses including a start pulse S and an end pulse E, and a data line for transmitting 1bit information from said respective stations to said control sector, whereby the 1-bit information of the information source being the highest in the priority level in the information sources making request for communication is transmitted to said central control sector, wherein said each station comprises: a. a 1-bit information source Sij which, for l x m information sources (where l and m are arbitrary numbers) divided into l groups every m ones in the order of the height of the priority levels, has a priority level i among those of 1 to m and a priority level j among those of 1 to l, b. first storage means which is set when transmission of said 1bit information of said information source is requested, c. an address received for receiviNg said pulse train of said address line thereinto, d. a data receiver for receiving the pulse of said data line thereinto, e. a timing circuit for taking out from outputs of said address receiver said start pulse S, the respectively i-th and (i- 1) th clocks (S + i) and (S + i - 1) from said start pulse S, and the j-th clock (E + j) from said end pulse E, f. first gate means for taking the logical AND product of an output of said first storage means and the pulse (S + i), g. means for discriminating if a pulse is fed into said data receiver during a period between the pulses S and (S + i - 1), h. second gate means for taking the logical AND product of an output of the discriminating means, the pulse (E + j), and an output of said first storage means, and i. a driver for transmitting to said data line the output of an OR logic means connected to the outputs of the first and second gate means.
Claim 2
Independent Claim
391 words
A system having a central control sector, a number of stations each including a 1-bit information source having a priority level, and means to couple said central control sector and said stations with a bus which consists of an address line for transmitting from said control sector to said respective stations a pulse train with clock signals of a fixed time interval included between reoccurrence pulses including a start pulse S and an end pulse E, and a data line for transmitting 1bit information from said respective stations to said control sector, whereby the 1-bit information of the information source being the highest in the priority level in the information sources making request for communication is transmitted to said central control sector, wherein said each station comprises: a. a 1-bit information source Sij which, for l x m information sources (where l and m are arbitrary numbers) divided into l groups every m ones in the order of the height of the priority levels, has a priority level i among those of 1 to m and a priority level j among those of 1 to l, b. first storage means which is set when transmission of said 1bit information of said information source is requested, c. an address received for receiviNg said pulse train of said address line thereinto, d. a data receiver for receiving the pulse of said data line thereinto, e. a timing circuit for taking out from outputs of said address receiver said start pulse S, the respectively i-th and (i- 1) th clocks (S + i) and (S + i - 1) from said start pulse S, and the j-th clock (E + j) from said end pulse E, f. first gate means for taking the logical AND product of an output of said first storage means and the pulse (S + i), g. means for discriminating if a pulse is fed into said data receiver during a period between the pulses S and (S + i - 1), h. second gate means for taking the logical AND product of an output of the discriminating means, the pulse (E + j), and an output of said first storage means, and i. a driver for transmitting to said data line the output of an OR logic means connected to the outputs of the first and second gate means.
Claim 3
Dependent Claim
43 words
A system according to claim 1, wherein said timing circuit further comprises means for generating the m-th pulse (E + m) from said end pulse E, and wherein the contents of said first storage means are reset by said pulse (E + m).
Claim 4
Dependent Claim
29 words
a bus disposed so as to be led out from said central control sector and to form a loop to be again returned to said central control sector, and
Claim 5
Dependent Claim
29 words
a bus disposed so as to be led out from said central control sector and to form a loop to be again returned to said central control sector, and
Claim 6
Dependent Claim
85 words
A system according to claim 1, wherein said discriminating means comprises a first flip-flop which is set by said pulse S and which is reset by said pulse (S + i - 1), AND gate means for taking the logical AND product of the output of said first flip-flop and an output of said data receiver, and a second flip-flop which is set by an output of said AND gate means and which is reset by said pulse (E + m) from said timing circuit.
Claim 7
Dependent Claim
318 words
local stations arranged along said loop of said bus and respectively coupled to said bus, I. said bus including an address line for transmitting a pulse train which consists of start pulses S repeated at a fixed period, end pulses E each being inserted between the adjacent pulses S and clock pulses C of a fixed interval inserted between both said pulses S and E, and a data line for transmitting 1-bit request pulses corresponding to said respective local stations, II. said respective local stations having priority levels different from one another, said levels being prescribed by a group priority address i (level signal) representative of priorities of 1 to an arbitrary integer l and an individual priority address j (order signal) representative of priorities of 1 to an arbitrary integer m, and said each local station comprising: a. means to transmit to said data line a group priority-level discriminating pulse (level signal) for discriminating the group priority level corresponding to a particular station, at the same timing as that of the i-th clock pulse from said start pulse S in said pulse train on said address line, b. means to transmit to said data line an individual-priority-level discriminating pulse order signal for discriminating the individual priority level peculiar to said particular station, at the same timing as that of the j-th clock pulse from said end pulse E in said pulse train on said address line, c. discriminator means to discriminate the presence of a prior pulse having a timing earlier than that of said group-priority-level discriminating pulse (level signal) peculiar to said particular station, from among those group-priority-level discriminating pulses (level signals) on said data line which have been transmitted by other stations, and d. means to stop the Operation of the transmitter means of said individual-priority-level discriminating pulse in response to a fact that said discriminator means has discriminated the presence of said prior pulse.
Claim 8
Dependent Claim
318 words
local stations arranged along said loop of said bus and respectively coupled to said bus, I. said bus including an address line for transmitting a pulse train which consists of start pulses S repeated at a fixed period, end pulses E each being inserted between the adjacent pulses S and clock pulses C of a fixed interval inserted between both said pulses S and E, and a data line for transmitting 1-bit request pulses corresponding to said respective local stations, II. said respective local stations having priority levels different from one another, said levels being prescribed by a group priority address i (level signal) representative of priorities of 1 to an arbitrary integer l and an individual priority address j (order signal) representative of priorities of 1 to an arbitrary integer m, and said each local station comprising: a. means to transmit to said data line a group priority-level discriminating pulse (level signal) for discriminating the group priority level corresponding to a particular station, at the same timing as that of the i-th clock pulse from said start pulse S in said pulse train on said address line, b. means to transmit to said data line an individual-priority-level discriminating pulse order signal for discriminating the individual priority level peculiar to said particular station, at the same timing as that of the j-th clock pulse from said end pulse E in said pulse train on said address line, c. discriminator means to discriminate the presence of a prior pulse having a timing earlier than that of said group-priority-level discriminating pulse (level signal) peculiar to said particular station, from among those group-priority-level discriminating pulses (level signals) on said data line which have been transmitted by other stations, and d. means to stop the Operation of the transmitter means of said individual-priority-level discriminating pulse in response to a fact that said discriminator means has discriminated the presence of said prior pulse.
Claim 9
Independent Claim
10 words
A system for transmitting 1-bit information having priority levels, comprising:
Claim 10
Independent Claim
10 words
A system for transmitting 1-bit information having priority levels, comprising:
Claim 11
Independent Claim
132 words
A system for transmitting information between a central control sector and a plurality of stations connected to said sector through address and data transmission lines, each station of said plurality being assigned a respective priority of access to said central control sector for transmitting data thereto, comprising: first means, responsive to an access request signal generated by a station among said plurality during a first time period, for supplying said access request signal to said data line; and second means, responsive to the order of priority of each station, for enabling a signal from a station to be supplied to said data line during a second time period only if, during said first period of time, no access request signal has been generated by another station having a higher order of priority.
Claim 12
Independent Claim
132 words
A system for transmitting information between a central control sector and a plurality of stations connected to said sector through address and data transmission lines, each station of said plurality being assigned a respective priority of access to said central control sector for transmitting data thereto, comprising: first means, responsive to an access request signal generated by a station among said plurality during a first time period, for supplying said access request signal to said data line; and second means, responsive to the order of priority of each station, for enabling a signal from a station to be supplied to said data line during a second time period only if, during said first period of time, no access request signal has been generated by another station having a higher order of priority.
Claim 13
Dependent Claim
65 words
A system according to claim 5, wherein said first means includes means, coupled to said address line, for supplying address signals thereto from said central control sector, so as to permit an access request signal to be supplied from a station to said data line during the period of time during which an address signal corresponding to that station is supplied to said first means.
Claim 14
Dependent Claim
101 words
A system according to claim 6, further including means for generating a control signal, to control the operation of said system, said control signal including a starting pulse, a plurality of clock pulses forming said address signal, following said start pulse during said first time period, the occurrence of each clock pulse with respect to said start pulse corresponding to a level of priority of a respective station, and an end pulse, followed by at least one additional pulse occurring during said second period of time, said control signal being supplied to said address signal supplying means from said address line.
Claim 15
Dependent Claim
33 words
A system according to claim 7 wherein said first means further includes timing means, responsive to said address signal supplying means, for generating timing signals corresponding to predetermined portions of said control signal.
Claim 16
Dependent Claim
62 words
A system according to claim 8, wherein said first means further includes a first gate means responsive to the coincidence of an access request signal and a timing signal from said timing signal generating means corresponding to the address of a station generating said access request signal, for coupling said access request signal to said data line during said first time period.
Claim 17
Dependent Claim
68 words
A system according to claim 9, wherein said second means includes a data receiver coupled to said data line for receiving each access request signal generated by any station during said first period of time according to its order of priority and a second gate means, coupled to said data receiver, for coupling a signal from a station to said data line during said second period of time.
Claim 18
Dependent Claim
74 words
A system according to claim 10, further including a first flip-flop responsive to an output from a station, for supplying an enabling signal to each of said first and second gate means, and for supplying a disabling signal to each of said first and second gate means in response to a resetting signal, from said timing means, corresponding to the last of said at least one of said additional signal following said end pulse.
Claim 19
Dependent Claim
130 words
A system according to claim 11, wherein said second means further includes a second flip-flop having its set and reset inputs connected to said timing means so as to receive therefrom a signal corresponding to said starting pulse and a signal corresponding to a predetermined clock pulse, the output of said second flip-flop being connected to one input of an AND gate, to the other input of which is connected the output of said data receiver, and wherein the output of said AND gate is connected to the set input of a third flip-flop, the rEset input of which is connected to said timing means to receive said at least one additional signal following said end pulse, the output of said third flip-flop being connected to said second gate means.
Claim 20
Dependent Claim
32 words
A system according to claim 12, further including an OR gate and a driving circuit connected in series to the outputs of said first and second gate means and said data line.
Claim 21
Dependent Claim
42 words
A system according to claim 7, wherein said stations are grouped according to levels of priority, each station within a predetermined priority group having an individual address corresponding to said at least one additional pulse occurring during said second period of time.
Claim 22
Dependent Claim
42 words
A system according to claim 12, wherein said stations are grouped according to levels of priority, each station with a predetermined priority group having an individual address corresponding to said at least one additional pulse occurring during said second period of time.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-10-08 | 1977-04-09 | 1977-10-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-10-08 | 1981-04-09 | 1981-10-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-10-08 | 1985-04-09 | 1985-10-09 | $7700.00 | Window Closed / Lapsed |