Sequencer for a dual switching regulator

Claim 2

A sequencer for a dual switching regulator having a transformer having a secondary winding, said sequencer comprising: first and second master-slave flip-flops each having first, second and third input leads and first and second output leads, said first output lead of said first flip-flop being connected to said first input lead of said second flip-flop, said second output lead of said first flip-flop being connected to said second input lead of said second flip-flop, said first output lead of said second flip-flop being connected to said second input lead of said first flip-flop, said second output lead of said second flip-flop being connected to said first input lead of said first flip-flop; an oscillator having a current input lead and an output lead, said output lead of said oscillator being coupled to said third input leads of said first and said second flip-flops; a disabling circuit, said disabling circuit being connected to said oscillator; and first, second and third diodes, said first diode being coupled between disabling circuit and said secondary winding of said transformer, said second diode being connected between said disabling circuit and said first output lead of said first flip-flop, said third diode being connected between said disabling circuit and said first output lead of said second flip-flop.

Claim 3

A sequencer for a dual switching regulator as defined in claim 1 including: a timer having an input lead and an output lead, said output lead of said timer being connected to said oscillator; and a pulse amplifier having an input lead and an output lead, said input lead of said amplifier being connected to said output lead of said oscillator, said output lead of said amplifier being connected to said third input leads of said first and said second flip-flops, said input lead of said timer being connected to said output lead of said amplifier.

Claim 4

A sequencer for a dual switching regulator having a transformer having a secondary winding, said sequencer comprising: first and second master-slave flip-flops, each having first, second and third input leads and first and second output leads, said first output lead of said first flip-flop being connected to said first input lead of said second flip-flop, said second output lead of said first flip-flop being connected to said second input lead of said second flip-flop, said first output lead of said second flip-flop being connected to said second input lead of said first flip-flop, said second output lead of said second flip-flop being connected to said first input lead of said first flip-flop; a unijunction transistor having an emitter and first and second bases; a capacitor, a first plate of said capacitor being connected to said emitter of said unijunction transistor; a signal-input terminal, said input terminal being connected to said emitter of said unijunction transistor; first and second resistors; diode means having an anode and a cathode, said first resistor being connected between a second plate of said capacitor and the cathode of said diode means; first and second reference potentials, the anode of said diode means being connected to said second potential; a first transistor having a base, a collector and an emitter, said collector of said first transistor being connected to said first base of said unijunction transistor, said emitter of said first transistor being connected to said second potential, said second resistor being connected between said first potential and said second base of said unijunction transistor, said cathode of said diode means being coupled to said third input leads of said first and said second flip-flops, said base of said first transistor being coupled to said secondary winding of said transformer; a third transistor having a base, a collector and an emitter, said emitter of said third transistor being connected to said second potential, said collector of said third transistor being connected to said base of said first transistor; and a one-shot having an input lead and an output lead, said input lead of said one-shot being connected to said third input leads of said first and said second flip-flops, said output lead of said one-shot being coupled to said base of said transistor.

Claim 5

A sequencer for a dual switching regulator having a transformer having a secondary winding, said sequencer comprising: first and second master-slave flip-flops, each having first, second and third input leads and first and second output leads, said first output lead of said first flip-flop being connected to said first input lead of said second flip-flop, said second output lead of said first flip-flop being connected to said second input lead of said second flip-flop, said first output lead of said second flip-flop being connected to said second input lead of said first flip-flop, said second output lead of said second flip-flop being connected to said first input lead of said first flip-flop; a unijunction transistor having an emitter and first and second bases; a capacitor, a first plate of said capacitor being connected to said emitter of said unijunction transistor; a signal-input terminal, said input terminal being connected to said emitter of said unijunction transistor; first and second resistors; diode means having an anode and a cathode, said first resistor being connected between a second plate of said capacitor and the cathode of said diode means; first and second reference potentials, the anode of said diode means being connected to said second potential; a first transistor having a base, a collector and an emitter, said collector of said first transistor being connected to said first base of said unijunction transistor, said emitter of said first transistor being connected to said second potential, said second resistor being connected between said first potential and said second base of said unijunction transistor, said cathode of said diode means being coupled to said third input leads of said first and said second flip-flops, said base of said first transistor being coupled to said secondary winding of said transformer; a third transistor having a base, a collector and an emitter, said emitter of said third transistor being connected to said second potential, said collector of said third transistor being connected to said base of said first transistor; and a one-shot having an input lead and an output lead, said input lead of said one-shot being connected to said third input leads of said first and said second flip-flops, said output lead of said one-shot being coupled to said base of said transistor.

Claim 6

A sequencer for a dual switching regulator as defined in claim 3 including; a fourth transistor having a base, a collector and an emitter, said emitter of said fourth transistor being connected to said second potential, said base of said fourth transistor being coupled to said secondary winding of said transformer; a fifth resistor, said fifth resistor being connected between said first potential and said collector of said fourth transistor; and first, second and third diodes, said first diode being connected between said collector of said fourth transistor and said base of said first transistor, said second diode being connected between said base of said first transistor and said first output lead of said first flip-flop, said third diode being connected between said base of said first transistor and said first output lead of said second flip-flop.

Claim 7

A sequencer for a dual switching regulator as defined in claim 3 including: a second transistor having a base, a collector and an emitter, said emitter of said second transistor being connected to said second potential, said base of said second transistor being connected to said cathode of said diode means; and third and fourth resistors, said third resistor being connected between said base of said second transistor and saId first potential, said fourth resistor being connected between said collector of said second transistor and said first potential, said collector of said second transistor being connected to said third input leads of said first and said second flip-flops, said input lead of said one-shot being connected to said collector of said second transistor.

Claim 8

A sequencer for a dual switching regulator having a transformer having a secondary winding, said sequencer comprising: first and second master-slave flip-flops, each having first, second and third input leads and first and second output leads, said first output lead of said first flip-flop being connected to said first input lead of said second flip-flop, said second output lead of said first flip-flop being connected to said second input lead of said second flip-flip, said first output lead of said second flip-flop being connected to said second input lead of said first flip-flop, said second output lead of said second flip-flop being connected to said first input lead of said first flip-flop; a unijunction transistor having an emitter and first and second bases; a capacitor, a first plate of said capacitor being connected to said emitter of said unijunction transistor; a signal-input terminal, said input terminal being connected to said emitter of said unijunction transistor; first and second resistors; diode means having an anode and a cathode, said first resistor being connected between a second plate of said capacitor and the cathode of said diode means; first and second reference potentials, the anode of said diode means being connected to said second potential; a first transistor having a base, a collector and an emitter, said collector of said first transistor being connected to said first base of said unijunction transistor, said emitter of said first transistor being connected to said second potential, said second resistor being connected between said first potential and said second base of said unijunction transistor, said cathode of said diode means being coupled to said third input leads of said first and said second flip-flops; a fourth transistor having a base, a collector and an emitter, said emitter of said fourth transistor being connected to said second potential, said base of said fourth transistor being coupled to said secondary winding of said transformer; a fifth resistor, said fifth resistor being connected between said first potential and said collector of said fourth transistor; and first, second and third diodes, said first diode being connected between said collector of said fourth transistor and said base of said first transistor, said second diode being connected between said base of said first transistor and said first output lead of said first flip-flop, said third diode being connected between said base of said first transistor and said first output lead of said second flip-flop.

Claim 9

A sequencer for a dual switching regulator having a transformer having a secondary winding, said sequencer comprising: first and second master-slave flip-flops, each having first, second and third input leads and first and second output leads, said first output lead of said first flip-flop being connected to said first input lead of said second flip-flop, said second output lead of said first flip-flop being connected to said second input lead of said second flip-flip, said first output lead of said second flip-flop being connected to said second input lead of said first flip-flop, said second output lead of said second flip-flop being connected to said first input lead of said first flip-flop; a unijunction transistor having an emitter and first and second bases; a capacitor, a first plate of said capacitor being connected to said emitter of said unijunction transistor; a signal-input terminal, said input terminal being connected to said emitter of said unijunction transistor; first and second resistors; diode means having an anode and a cathode, said first resistor being connected between a second plate of said capacitor and the cathode of said diode means; first and second reference potentials, the anode of said diode means being connected to said second potential; a first transistor having a base, a collector and an emitter, said collector of said first transistor being connected to said first base of said unijunction transistor, said emitter of said first transistor being connected to said second potential, said second resistor being connected between said first potential and said second base of said unijunction transistor, said cathode of said diode means being coupled to said third input leads of said first and said second flip-flops; a fourth transistor having a base, a collector and an emitter, said emitter of said fourth transistor being connected to said second potential, said base of said fourth transistor being coupled to said secondary winding of said transformer; a fifth resistor, said fifth resistor being connected between said first potential and said collector of said fourth transistor; and first, second and third diodes, said first diode being connected between said collector of said fourth transistor and said base of said first transistor, said second diode being connected between said base of said first transistor and said first output lead of said first flip-flop, said third diode being connected between said base of said first transistor and said first output lead of said second flip-flop.

Claim 10

A sequencer for a dual switching regulator as defined in claim 6 including: a second transistor having a base, a collector and an emitter, said emitter of said second transistor being connected to said second potential, said base of said second transistor being connected to said cathode of said diode means; and third and fourth resistors, said third resistor being connected between said base of said second transistor and said first potential, said fourth resistor being connected between said collector of said second transistor and said first potential, said collector of said second transistor being connected to said third input leads of said first and said second flip-flops.

Claim 11

A sequencer for a dual switching regulator as defined in claim 6 including: second and third transistors each having a base, a collector and an emitter, said emitters of said second and said third transistors each being connected to said second potential, said base of said second transistor being connected to said cathode of said diode means, said collector Of said third transistor being connected to said base of said first transistor; third and fourth resistors, said third resistor being connected between said first potential and said base of said second transistor, said fourth resistor being connected between said first potential and said collector of said second transistor, said collector of said second transistor being connected to said third input leads of said first and said second flip-flops; and a one-shot having an input lead and an output lead, said input lead of said one-shot being connected to said collector of said second transistor, said output lead of said one-shot being coupled to said base of said third transistor.