Electronic locking system

Claim 2

An n-dimensional logic function generation and comparison system for use as an electronic locking system comprising, An n-dimensional counter capable of generating in electrical impulse form all numbers of a n-dimensional logic system; A reference logic function source having a unique logic function stored at a plurality discrete addresses therein, each of said addresses having a one-to-one correspondence with a number in said n-dimensional logic system, said reference logic function source generating in electrical impulse form the logic function stored at a specific address upon receipt in electrical impulse form of said number corresponding to said address; An unknown loGic function source having a unique logic function stored at a plurality of discrete addresses, each of said addresses having a one-to-one correspondence with a number in said n-dimensional logic system, said unknown logic function source generating in electrical impulse form the logic function stored at a specific address upon receipt in electrical impulse form of said number corresponding to said address; A comparator adapted to receive simultaneously said unique logic functions in electrical impulse form from said reference logic function source and said unknown logic function source, said comparator comparing said simultaneously received logic functions in stepwise progression, said comparator emitting a first electrical signal if all logic functions match and emitting a second and different electrical signal if at least one bit of one pair of said logic functions does not match; and An electrically responsive instrumentality adapted to be energized or de-energized upon receipt of said first electrical signal.

Claim 3

The electronic locking system of claim 1 in combination with a trial counter and alarm circuit to monitor the number of attempted comparisons between the unknown logic function source and the reference logic function source and to register an alarm when more than a predetermined number of unsuccessful attempted comparisons have been made and a maximum voltage sensor to deactivate the locking system if a surge of current above a predetermined level is surged through the system.

Claim 4

The electronic locking system of claim 2 wherein said unknown logic function source is an m''th state to n''th state logic encoder.

Claim 5

The electronic locking system of claim 3 wherein said m''th state to nth state logic encoder is a decimal to binary encoder.

Claim 6

The electronic locking system of claim 2 wherein said n-dimensional system is the binary system, said counter is an oscillator driven binary counter and said reference and unknown logic function sources are read-only-memories and said unknown read-only-memory is detachably attachable with a socket having an array of electrical connectors therein to establish temporary electrical communication between the inputs of said unknown ROM and said binary counter and between the outputs of said unknown ROM and said binary comparator.

Claim 7

The electronic locking system of claim 5 wherein said read-only-memories are MOS devices.

Claim 8

The electronic locking system of claim 5 wherein said read-only-memories are fusible read-only-memories.

Claim 9

The electronic locking system of claim 5 wherein said read-only-memories are amorphous semiconductor read-only-memories.

Claim 10

The electronic locking system of claim 5 wherein said read-only-memories are avalanche induced electromigration read-only-memories.

Claim 11

The electronic locking system of claim 5 wherein said electrically responsive instrumentality is a solenoid-operated lock and wherein said first electrical signal from said comparator serves to energize said solenoid to open said lock.

Claim 12

The electronic locking system of claim 10 in combination with a recording means to record the time and place said unknown read-only-memory is presented for comparison and to record the identity of the authorized holder of the unknown read-only-memory.

Claim 13

An n-dimensional logic function generation and comparison system for use as a transient electronic locking system, comprising: An n-dimensional counter capable of generating in electrical impulse form al numbers of an n-dimensional logic system; At least one master reference logic function source having a unique logic function stored at a plurality of discrete addresses therein, each of said addresses having a one-to-one correspondence wtih a number in said n-dimensional logic system, said reference logic function source generating in electrical impulse form the logic function stored at a specific address upon receipt in electrical impulse form of said number corrEsponding to said address; A tenant reference logic function source having a unique logic function stored at a plurality of discrete addresses therein, each of said addresses having a one-to-one correspondence with a number in said n-dimensional logic system, said reference logic function source generating in electrical impulse form the logic function stored at a specific address upon receipt in electrical impulse form of said number corresponding to said address; An unknown logic function source having a unique logic function stored at a plurality of discrete addresses, each of said addresses having a one-to-one correspondence with a number in said n-dimensional logic system, said unknown logic function source generating in electrical impulse form the logic function stored at a specific address upon receipt in electrical impulse form of said number corresponding to said address, and said unknown logic function source having an indicator means to indicate whether said unknown source is an unknown tenant or a particular unknown master logic function source; A comparator adapted to receive simultaneously said unique logic functions in electrical impulse form from the appropriate reference logic function source and said unknown logic function source, said comparator comparing said simultaneously received logic functions in stepwise progression, said comparator emitting a first electrical signal if all logic functions match and emitting a second and different electrical signal if at least one bit of one pair of said logic functions does not match; and An electrically responsive instrumentatlity adapted to be energized or de-enerigzed upon receipt of said first electrical signal.

Claim 14

An n-dimensional logic function generation and comparison system for use as a transient electronic locking system, comprising: An n-dimensional counter capable of generating in electrical impulse form al numbers of an n-dimensional logic system; At least one master reference logic function source having a unique logic function stored at a plurality of discrete addresses therein, each of said addresses having a one-to-one correspondence wtih a number in said n-dimensional logic system, said reference logic function source generating in electrical impulse form the logic function stored at a specific address upon receipt in electrical impulse form of said number corrEsponding to said address; A tenant reference logic function source having a unique logic function stored at a plurality of discrete addresses therein, each of said addresses having a one-to-one correspondence with a number in said n-dimensional logic system, said reference logic function source generating in electrical impulse form the logic function stored at a specific address upon receipt in electrical impulse form of said number corresponding to said address; An unknown logic function source having a unique logic function stored at a plurality of discrete addresses, each of said addresses having a one-to-one correspondence with a number in said n-dimensional logic system, said unknown logic function source generating in electrical impulse form the logic function stored at a specific address upon receipt in electrical impulse form of said number corresponding to said address, and said unknown logic function source having an indicator means to indicate whether said unknown source is an unknown tenant or a particular unknown master logic function source; A comparator adapted to receive simultaneously said unique logic functions in electrical impulse form from the appropriate reference logic function source and said unknown logic function source, said comparator comparing said simultaneously received logic functions in stepwise progression, said comparator emitting a first electrical signal if all logic functions match and emitting a second and different electrical signal if at least one bit of one pair of said logic functions does not match; and An electrically responsive instrumentatlity adapted to be energized or de-enerigzed upon receipt of said first electrical signal.

Claim 15

The transient electronic locking system of claim 12 wherein said n-dimensional system is the binary system, said reference and unknown logic function sources are read-only-memories, wherein said unknown read-only-memory is detachably attachable with a socket having an array of electrical connectors therein to establish temporary electrical communication between the inputs of said unknown read-only-memory and said binary counter and between the outputs of said unknown read-only-memory and said binary comparator, wherein said electrically responsive instrumentality is a solenoid-operated lock and wherein said first electrical signal emitted by said comparator energizes said solenoid to open said lock.

Claim 16

The transient electronic locking system of claim 13 in combination with a trial counter to monitor the number of attempts to compare said unknown logic function source with the appropriate reference logic function source, an alarm circuit to register an alarm and to deactivate said solenoid when more than a predetermined number of unsuccessful comparison attempts have been made, a maximum voltage sensor to deactivate said solenoid when a surge of current above a predetermined level is passed through the system, and a recording means to record the time and place said unknown logic function source is presented for comparison and to record the identity of the authorized holder of the unknown logic function source.

Claim 17

The transient electronic locking system of claim 14 wherien said read-only-memories are MOS devices.

Claim 18

The transient electronic locking system of claim 14 wherein said read-only-memories are fusible read-only-memories.

Claim 19

The transient electronic locking system of claim 14 wherein said read-only-memories are amorphous semiconductor read-only-memories.

Claim 20

The transient electronic locking system of claim 14 wherein said read-only-memories are avalanche induced electro-migration read-only-memories.