Phase shift modulator

Claim 2

Phase modulation apparatus comprising: a multistage frequency divider having an input and an output, said input of said frequency divider operable to receive a first frequency signal to provide a second frequency carrier signal at the output of said frequency divider, means for recieving a sequential digital signal; said means coupled to at least one of said stages of said frequency divider for selectively shifting the phase of said signal passing through said frequency divider in accordance with said digital signals so that the phase of said carrier output signal is a function of the data in said sequential digital signal, a gating means coupled between each stage of said frequency divider and the associated output lead from said digital signal receiving means, said gating means operable to change the stable state of its associated stage when actuated, phase shift timing means coupled to said gating means in a predetermined sequence with a gating means being actuated by the simultaneous occurrence thereat of a phase shift timing signal and a voltage level from said digital signal receiving means; a bistable device associated with each stage of said frequency divider, means coupling said bistable device to its associated stage such that said bistable device attains a stable state opposite to that of its associated stage, and means coupling said bistable device to said gating means of its associated stage and operable to cause its associated stage to be switched to its other stable state once for each simultaneous occurrence at said gating means of a said phase shift timing signal and a voltage level from said converting means.

Claim 3

The apparatus according to claim 1 wherein; said digital signal includes sequentially occurring binary bits, and said means includes converter means having an output lead coupled to each stage of said frequency divider and operable to convert at least one of said binary bits at a time into one or more voltage levels indicative of said bits(s) and which voltages level(s) appears on a predetermined one(s) of said output leads.

Claim 4

The apparatus according to claim 2 wherein; each stage of said frequency divider includes a primary binary device.

Claim 5

The apparatus according to claim 3 wherein; switching of a primary bistable device to its other stable state by actuation of its associated gating means changes the phase of the signal passing therethrough by 180* with a resulting change in the phase of said output carrier signal by an amount determined by the location of said primary bistable device in said frequency divider.

Claim 6

The apparatus according to claim 4 wherein; each said primary binary device of said frequency divider is operable to reduce the frequency of a signal applied thereto by half by being switched between its two stable states by said applied signal.

Claim 7

The apparatus according to claim 5 wherein; said phase shift timing means is operable to cause the switching of said bistable devices to be out of phase within the switching of said bistable devices by said frequency signal passing through said frequency divider.

Claim 8

Phase modulation apparatus comprising; a plurality of bistable devices, each said bistable device operable to reduce the frequency of a signal applied thereto by half by being switched between its two stable states by said applied signal, means connecting said bistable devices into a serial chain to constitute a frequency divider having an input at one end and an output at the other end thereof, a first frequency signal source coupled to said input of the frequency divider to provide a second frequency carrier signal at said output of the frequency divider, gating means coupled to at least some said binary devices for switching the associated binary device to its other stable state when said gating means is actuated; a serially occurring digit data train source, converting means having a plurality of outputs and operable to receive said serial data train to produce an output signal on at least one of said outputs which is indicative of the data occurring in a predetermined length of said serial data train, said gating means associated with said binary devices being coupled to a different one of said converter outputs, phase shift timing means coupled to said gating means for providing sequentially occurring timing signals to enable said gating means in a predetermined sequence to selectively shift the phase of the signal passing through said frequency divider in accordance with said converter output so that the phase of said carrier output signal is a function of the data in said serial data train; wherein the sequence of enabling said gating means begins with the gating means associated with the bistable device at the output end of said frequency divider and ends with the gating means associated with the bistable device at the input end of said frequency divider.

Claim 9

Phase modulation apparatus comprising; a plurality of bistable devices, each said bistable device operable to reduce the frequency of a signal applied thereto by half by being switched between its two stable states by said applied signal, means connecting said bistable devices into a serial chain to constitute a frequency divider having an input at one end and an output at the other end thereof, a first frequency signal source coupled to said input of the frequency divider to provide a second frequency carrier signal at said output of the frequency divider, gating means coupled to at least some said binary devices for switching the associated binary device to its other stable state when said gating means is actuated; a serially occurring digit data train source, converting means having a plurality of outputs and operable to receive said serial data train to produce an output signal on at least one of said outputs which is indicative of the data occurring in a predetermined length of said serial data train, said gating means associated with said binary devices being coupled to a different one of said converter outputs, phase shift timing means coupled to said gating means for providing sequentially occurring timing signals to enable said gating means in a predetermined sequence to selectively shift the phase of the signal passing through said frequency divider in accordance with said converter output so that the phase of said carrier output signal is a function of the data in said serial data train; wherein the sequence of enabling said gating means begins with the gating means associated with the bistable device at the output end of said frequency divider and ends with the gating means associated with the bistable device at the input end of said frequency divider.

Claim 10

The apparatus according to claim 7 wherein; said data train includes binary ONE''s and ZERO''s and said converting means output is indicative of a plurality of said binary bits at a time.

Claim 11

The apparatus according to claim 7 wherein; switching of a bistable device by its associated gating means changes the phase of the singal passing through said bistable device by 180* with a resulting change in phase of said output carrier signal by an amount determined by the location of said bistable device in said frequency divider.

Claim 12

The apparatus according to claim 7 wherein; said phase shift timing signals occur out of phase with the switching of the bistable devices by the frequency signal passing through said frequency divider.

Claim 13

Phase modulation apparatus comprising: a plurality of bistable devices, each said bistable device operable to reduce the frequency of a signal applied thereto by half by being switched between its two stable states by said applied signal, means connecting said bistable devices into a serial chain to constitute a frequency divider having an input at one end and an output at the other end thereof, a first frequency signal source coupled to said input of the frequency divider to provide a second frequency carrier signal at said output of the frequency divider, gating means coupled to at least some said binary devices for switching the associated binary device to its other stable state when said gating means is actuated; a serially occurring digit data train source, converting means having a plurality of outputs and operable to receive said serial data to produce an output signal on at least one of said outputs which is indicative of the data occurring in a predetermined length of said serial data train, said gating means associated with said binary devices being coupled to a different one of said converter outputs, phase shift timing means coupled to said gating means for providing sequentially occurring timing signals to enable said gating means in a predetermined sequence to selectively shift the phase of the signal passing through said frequency divider in accordance with said converter output so that the phase of said carrier output signal is a function of the data in said serial data train; another bistable device coupled to each said bistable device of said frequency divider and operable to be in a stable state opposite to that of its associated said bistable device, said gating means being actuated upon the simultaneous occurrence thereafter of an output from said converting means and a phase shift timing signal, and means coupling said other bistable device to the gating means of its associated said bistable device and operable to prevent switching of the associated said bistable device more than once for each actuation of the associated said gating means.

Claim 14

Phase modulation apparatus comprising: a plurality of bistable devices, each said bistable device operable to reduce the frequency of a signal applied thereto by half by being switched between its two stable states by said applied signal, means connecting said bistable devices into a serial chain to constitute a frequency divider having an input at one end and an output at the other end thereof, a first frequency signal source coupled to said input of the frequency divider to provide a second frequency carrier signal at said output of the frequency divider, gating means coupled to at least some said binary devices for switching the associated binary device to its other stable state when said gating means is actuated; a serially occurring digit data train source, converting means having a plurality of outputs and operable to receive said serial data to produce an output signal on at least one of said outputs which is indicative of the data occurring in a predetermined length of said serial data train, said gating means associated with said binary devices being coupled to a different one of said converter outputs, phase shift timing means coupled to said gating means for providing sequentially occurring timing signals to enable said gating means in a predetermined sequence to selectively shift the phase of the signal passing through said frequency divider in accordance with said converter output so that the phase of said carrier output signal is a function of the data in said serial data train; another bistable device coupled to each said bistable device of said frequency divider and operable to be in a stable state opposite to that of its associated said bistable device, said gating means being actuated upon the simultaneous occurrence thereafter of an output from said converting means and a phase shift timing signal, and means coupling said other bistable device to the gating means of its associated said bistable device and operable to prevent switching of the associated said bistable device more than once for each actuation of the associated said gating means.