Semiconductor charge transfer devices

Claim 2

In semiconductor signal transfer apparatus of the type comprising a plurality of electrodes successively arranged along a surface of a semiconductor wafer, the electrodes corresponding to information storage regions in the wafer, and means for transferring charge representative of information along the wafer comprising means for producing successive voltages between successive electrodes, the improvement wherein: the voltage applied to an electrode for causing charge to be transferred between successive storage regions is sufficiently large to cause a semiconductor avalanche breakdown if there is charge representative of an information bit stored in the next preceding storage region, but insufficient to cause avalanche breakdown if there is no such charge stored in the next preceding storage region, whereby any charge transferred between successive storage regions is regenerated by avalanche breakdown.

Claim 3

The signal transfer apparatus of claim 1 wherein: said plurality of electrodes are separated from the semiconductor wafer by a thin dielectric layer.

Claim 4

The signal transfer apparatus of claim 2 wherein: the region of the semiconductor wafer adjacent said plurality of electrodes in which charge is stored and transferred is substantially free of any rectifying junctions; and said transferred charge comprises minority current carriers in said semiconductor wafer.

Claim 5

The signal transfer apparatus of claim 2 wherein: each storage region in the wafer is defined by a region doped to a conductivity opposite that of the major portion of the wafer, whereby said signal transfer apparatus operates as a ''''bucket brigade'''' device.

Claim 6

The apparatus of claim 3 wherein: the wafer is an n-type wafer and the transferred charge comprises holes.

Claim 7

Semiconductor signal translating apparatus comprising: a semiconductor crystal having on one surface thereof an array of electrodes each defining successive storage regions; means for forming in at least one of the storage regions of the semiconductor crystal a packet of charges; means for applying a voltage V between successive electrodes of sufficient value to controllably transfer the packet of charges between successive storage regions; said voltage V creating a localized voltage Delta V0 within the semiconductor crystal in the absence of a packet of charge, and a localized voltage Delta V1 in the crystal in the presence of a packet of charge, the voltage Delta V1 being greater than Delta V0; said semiconductor crystal being characterized by an avalanche breakdown voltage VB between the storage regions where VB has a value between Delta V0 and Delta V1, whereby avalanche breakdown occurs if a packet of charge is being transferred, but no breakdown occurs in the absence of a packet of charge.

Claim 8

Semiconductor signal translating apparatus comprising: a semiconductor crystal having on one surface thereof an array of electrodes each defining successive storage regions; means for forming in at least one of the storage regions of the semiconductor crystal a packet of charges; means for applying a voltage V between successive electrodes of sufficient value to controllably transfer the packet of charges between successive storage regions; said voltage V creating a localized voltage Delta V0 within the semiconductor crystal in the absence of a packet of charge, and a localized voltage Delta V1 in the crystal in the presence of a packet of charge, the voltage Delta V1 being greater than Delta V0; said semiconductor crystal being characterized by an avalanche breakdown voltage VB between the storage regions where VB has a value between Delta V0 and Delta V1, whereby avalanche breakdown occurs if a packet of charge is being transferred, but no breakdown occurs in the absence of a packet of charge.

Claim 9

The signal translating apparatus of claim 6 wherein: the semiconductor is predominantly of one conductivity, and the packet of charges constitutes minority carriers.

Claim 10

The signal translating apparatus of claim 7 wherein: the voltage applying means comprises a succession of electrodes separated from the crystal by a thin dielectric layer.

Claim 11

The signal translating apparatus of claim 8 further comprising: means for periodically applying to each of the electrodes a voltage sufficiently small to permit semiconductor majority carriers to be transported to a location near the interface of the crystal and a thin dielectric layer, thereby permitting majority carriers to be temporarily contained at or near the surface by recombination centers such as surface traps.

Claim 12

The signal transmitting apparatus of claim 9 wherein: the aforesaid sufficiently small voltage is substantially equal to the flat-band voltage of the semiconductOr.