Interface between analog or digital lines and a pulse code modulation circuit

Claim 1

An interface circuit for the control of bidirectional data exchanges between (1) a plurality of transmission lines connected to terminals such as subscriber''s sets, pace switching centers, and transmitter-receivers of digital and analog data, and (2) a local or remote data switching center which operates in PCM and in time multiplex, the connection being made through a PCM transmission system, said interface circuit comprising: an analog data transmission line, associated with a signalling supervision circuit supplying a multiple bit code of first bit length characterizing the incoming signalling status of a terminal; analog lines connected to a first time selecTion circuit functioning as a sampling circuit in the incoming direction and as a demultiplexer in the outgoing direction; a plurality of digital data transmission lines on which are transmitted plural bit codes, said last-mentioned lines being connected to a second time selection circuit; a clock delivering a succession of channel codes to supply through a decoder a series of channel time slot signals, said codes and signals being synchronized at the time base of the PCM transmission system; means for assigning each channel time slot to a selection of a transmission line within either time selection circuit; means connecting the first time selection circuit to a coder-decoder having a capacity equal to the number of channel code bits to carry out the coding of the incoming analog information, and the decoding of the messages received from the PCM transmission equipment, each incoming and outgoing coded message comprising messages of a second code length comprised of sub-messages constituting a loop or line status code; means for carrying out directly the connection with the PCM transmission line in the case of messages of said second code length exchanges between a circuit time selection circuit and said line; a circuit carrying out the connection with the PCM transmission line through an outgoing switching circuit in the case of the codes related to the lines, said circuit comprising a multiple gate controlling the transmission of first code length between the coder-decoder and the PCM line, a multiple gate controlling the transmission of messages of said first bit length gate controlling the transmission of a like plurality of bits between the signalling supervision circuit and the PCM line; means for controlling said gates including an outgoing switching member of the nondestructive readout type, said memory comprising a number of addresses equal to the number of channels read cyclically under the control of the channel time slot signals, each address containing one of three codes, the first code being written in each address corresponding to the time of selection of a line, a second code being written in each address corresponding to a line, the second code controlling the opening of a pair of gates, the third code controlling the opening of a pair of gates G1 and G3 so that one may choose between the utilization of the bit length of messages for representing analog data and the utilization of submessages only for representing said data, with the remaining bits of the message being used for characterizing the incoming or outgoing signalling status.