US3760265A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Open circuit detection apparatus for thermocouple circuits
Assignee: Honeywell Inc
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Filing: 1972-05-16
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Granted: 1973-09-18
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Expires: 1992-05-16
Abstract
Abstract A circuit for detecting an open circuit condition of a thermocouple using a storage capacitor to transfer a thermocouple output signal to an analog to digital converter circuit and pulse signal means arranged to apply a pulse signal to the capacitor when the capacitor is connected to the analog to digital converter for storage by the capacitor. The stored pulse signal is subsequently discharged by a thermocouple circuit which is a complete circuit. An open-circuited thermocouple circuit will not discharge the pulse signal stored on the capacitor, and the total stored signal will accumulate during subsequent successive switching of the capacitor between the open-circuited thermocouple circuit and the analog to digital converter until a sufficient charge has been accumulated to energize an alarm signal connected to the analog to digital converter.
Inventors
- 👤 F Hutch
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 12:08
CPC Classifications
G; G01; G01K; G01K7/00; G01K7/02; G01K7/026; G01R; G01R31/00; G01R31/50; G01R31/52; G01R31/54
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
165 words
A circuit for detecting an open circuit state of a circuit under test comprising: a signal storage means, signal detecting means operable in response to a predetermined level of a signal stored in said signal storage means, switching means arranged to alternately connect said storage means between the circuit under test and said detecting means, and signal means arranged to supply a signal to said storage means when said storage means is connected to said detecting means, said signal having a level above the predetermined level at which said signal detecting means operatively responds and said signal storage means stores a portion of said signal during each connection of said signal storage means to said signal means by said switching means, whereby if the circuit under test is open, the signal stored on said storage means is increased by the successive storage of additional signals from said signal means until said predetermined level is reached and said signal detecting means responds to said predetermined level.
Claim 2
Dependent Claim
165 words
A circuit for detecting an open circuit state of a circuit under test comprising: a signal storage means, signal detecting means operable in response to a predetermined level of a signal stored in said signal storage means, switching means arranged to alternately connect said storage means between the circuit under test and said detecting means, and signal means arranged to supply a signal to said storage means when said storage means is connected to said detecting means, said signal having a level above the predetermined level at which said signal detecting means operatively responds and said signal storage means stores a portion of said signal during each connection of said signal storage means to said signal means by said switching means, whereby if the circuit under test is open, the signal stored on said storage means is increased by the successive storage of additional signals from said signal means until said predetermined level is reached and said signal detecting means responds to said predetermined level.
Claim 3
Dependent Claim
16 words
A circuit as set forth in claim 1 wherein said signal storage means is a capacitor.
Claim 4
Dependent Claim
34 words
A circuit as set forth in claim 2 wherein said switching means includes means arranged to connect said signal source means to said capacitor when said capacitor is connected to said signal detecting means.
Claim 5
Dependent Claim
23 words
A circuit as set forth in claim 3 wherein said switching means and said last-mentioned means are driven by a common drive means.
Claim 6
Dependent Claim
46 words
A circuit as set forth in claim 1 wherein said signal means includes a pulse signal source and a resistor in series with said pulse signal source to limit the signal transfer rate of a signal from said pulse signal source to said signal storage means.
Claim 7
Dependent Claim
44 words
A circuit as set forth in claim 2 wherein said signal means includes a pulse signal source and a resistor in series with said pulse signal source to limit the signal transfer rate of a signal from said pulse signal source to said capacitor.
References Cited (Backward Citations)
CA682934A
Cited
US2937369A
Cited
GB897938A
Cited
US3319157A
Cited
US3468164A
Cited
US3617886A
Cited
US3590370A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-09-17 | 1977-03-19 | 1977-09-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-09-17 | 1981-03-19 | 1981-09-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-09-17 | 1985-03-19 | 1985-09-18 | $7700.00 | Window Closed / Lapsed |