Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
438 words
In a PCM voice-frequency telecommunication system with at least two terminals linked by a signal path for exchanging digitized message samples in the form of multibit pulse codes between local channels served by each terminal, each local channel including and incoming line for the delivery to the associated terminal of messages destined for transmission over said signal path and an outgoing line for receiving messages arriving at said associated terminal over said signal path, the improvement wherein each terminal comprises: at least one processing station provided with a plurality of group coders for the incoming lines of respective groups of local channels and with a plurality of group decoders for the outgoing lines thereof; programming means assigning to all said groups a predetermined number of time slots in a recurrent message frame; timing means individual to said station controlled by said programming means for dividing each message frame into a number of scanning intervals corresponding to the number of channels per group and for operating each group coder to sample all the incoming lines of its group during respective intervals to generate a sequence of incoming significant pulse codes from active lines interspersed with blank codes from inactive lines; monitoring means connected to said group coders for determining the presence of a significant pulse code from each group in any of said scanning intervals; logical circuitry connected to said monitoring means for establishing a binary activity pattern for the incoming lines of each group; multiplexing means having access to said coders for combining their outputs into a composite code word occupying at least part of the assigned time slots in said message frame; gating means controlled by said logical circuitry for selectively blocking the access of said multiplexing means to said group coders in response to said activity pattern to prevent the inclusion of blank codes from inactive lines in said composite code word; address-encoding means in said logical circuitry connected to said multiplexing means for accompanying said composite code word with allocation bits conveying activity information in response to said activity pattern; transceiving means connected to said multiplexing means for transmitting successive message frames including said composite code word over said signal path to a remote terminal; demultiplexing means connected to said transceiving means for separating and temporarily storing individual pulse codes of an arriving code word; address-decoding means in said demultiplexing means responsive to the allocation bits of arriving code words for deriving therefrom the identity of the origins of their individual pulse codes; and distributing means controlled by said address-decoding means for directing said individual pulse codes to the group decoders of respective local channels.
Claim 2
Dependent Claim
438 words
In a PCM voice-frequency telecommunication system with at least two terminals linked by a signal path for exchanging digitized message samples in the form of multibit pulse codes between local channels served by each terminal, each local channel including and incoming line for the delivery to the associated terminal of messages destined for transmission over said signal path and an outgoing line for receiving messages arriving at said associated terminal over said signal path, the improvement wherein each terminal comprises: at least one processing station provided with a plurality of group coders for the incoming lines of respective groups of local channels and with a plurality of group decoders for the outgoing lines thereof; programming means assigning to all said groups a predetermined number of time slots in a recurrent message frame; timing means individual to said station controlled by said programming means for dividing each message frame into a number of scanning intervals corresponding to the number of channels per group and for operating each group coder to sample all the incoming lines of its group during respective intervals to generate a sequence of incoming significant pulse codes from active lines interspersed with blank codes from inactive lines; monitoring means connected to said group coders for determining the presence of a significant pulse code from each group in any of said scanning intervals; logical circuitry connected to said monitoring means for establishing a binary activity pattern for the incoming lines of each group; multiplexing means having access to said coders for combining their outputs into a composite code word occupying at least part of the assigned time slots in said message frame; gating means controlled by said logical circuitry for selectively blocking the access of said multiplexing means to said group coders in response to said activity pattern to prevent the inclusion of blank codes from inactive lines in said composite code word; address-encoding means in said logical circuitry connected to said multiplexing means for accompanying said composite code word with allocation bits conveying activity information in response to said activity pattern; transceiving means connected to said multiplexing means for transmitting successive message frames including said composite code word over said signal path to a remote terminal; demultiplexing means connected to said transceiving means for separating and temporarily storing individual pulse codes of an arriving code word; address-decoding means in said demultiplexing means responsive to the allocation bits of arriving code words for deriving therefrom the identity of the origins of their individual pulse codes; and distributing means controlled by said address-decoding means for directing said individual pulse codes to the group decoders of respective local channels.
Claim 3
Dependent Claim
77 words
The improvement defined in claim 1 wherein said monitoring means includes a plurality of digital threshold circuits each connected to the output of a respective group coder, in parallel with respective inputs of said multiplexing means, and a set of integrating circuits in the output of each threshold circuit sequentially enabled by said timing means during respective scanning intervals for ascertaining the presence of bits on any given line during successive frames in an extended buildup period.
Claim 4
Dependent Claim
41 words
The improvement defined in claim 2, further comprising delay means inserted between said group coders and said respective inputs of said multiplexing means for retarding their sequences of significant pulse codes by a length of time substantially equaling said buildup period.
Claim 5
Dependent Claim
43 words
The improvement defined in claim 1 wherein said terminal includes a plurality of stations each assigned a subframe of predetermined length in a message frame, the timing means individual to said stations being cyclically aCtuated by said programming means during their respective subframes.
Claim 6
Dependent Claim
150 words
The improvement defined in claim 1 wherein said multiplexing means comprises a plurality of shift registers, one for each group, and a like plurality of buffer registers connected to said logical circuitry for receiving therefrom the activity patterns of the respective groups during each message frame, said timing means including a source of low-rate stepping pulses for reading out the activity pattern of each buffer register in the rhythm of said scanning intervals, said gating means comprising an individual gate for each of said shift registers controlled by the respective buffer register, each shift register having a capacity for simultaneous inscription of a pulse code from each incoming line of the respective group, said timing means further including a source of high-speed stepping pulses for reading out the contents of each shift register during a fraction of the number of time slots assigned to all the groups of said station.
Claim 7
Dependent Claim
51 words
The improvement defined in claim 5 wherein said timing means further includes a source of supplemental loading pulses for each of said shift registers effetive upon completion of the readout of the corresponding buffer register to advance the first pulse code inscribed in the shift register to a final stage thereof.
Claim 8
Dependent Claim
65 words
The improvment defined in claim 6 wherein each of said shift registers has a series of stages each with a multiplicity of storage elements for the parallel entry of the bits of each pulse code, said multiplexing means further including code-counting means responsive to the number of significant pulse codes indentified by said activity pattern for determining the requisite number of said supplemental loading pulses.
Claim 9
Dependent Claim
49 words
The improvement defined in claim 5 wherein said multiplexing means further includes supervisory counting means responsive to the total number of significant pulse codes in all said buffer registers for halting the operation of said monitoring means upon said total number exceeding said predetermined number of assigned time slots.
Claim 10
Dependent Claim
62 words
The improvement defined in claim 5 wherein said multiplexing means further includes bit-counting means responsive to the number of significant codes identified by said activity pattern for determining the requisite number of said high-speed stepping pulses and switchover means for terminating the readout of one shift register and starting the readout of another shift register under the control of said bit-counting means.
Claim 11
Dependent Claim
43 words
The improvement defined in claim 1 wherein said demultiplexing means includes multistage register means controlled by said address-decoding means for redeploying the individual pulse codes of an arriving code word in respective scanning intervals assigned to their originating channels within the corresponding groups.