US3756877A
Expired / Lapsed
US
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By dielectric material method for manufacturing a semiconductor integrated circuit isolated
Assignee: Toshiba Corp
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Filing: 1971-10-04
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Granted: 1973-09-04
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Expires: 1991-10-04
Abstract
Abstract A METHOD FOR MANUFACTURING AN INTEGRATED CIRCUIT ISOLATED BY DILECTRIC MATERIAL COMPRISING THE STEPS OF CARRYING OUT THE SELECTIVE EPITAXIAL GROWTH OF ISLAND REGIONS ON THE UPPER SURFACE OF A SILICON SUBSTRATE, COATING SAID ISLAND REGIONS AND THE UPPER SURFACE OF THE SUBSTRATE WITH AN INSULATING FILM, FORMING A SILICON LAYER ON SAID INSULATING FILM AND ETCHING THE SILICON SUBSTRATE WITH AN ETCHANT COMPRISING HF, NHO3 AND CH3COOH AND A DECOMPOSING OR OXIDIZING AGENT WHICH CAN SELECTIVELY ETCH THE SILICON SUBSTRATE WITHOUT ETCHING SAID ISLAND REGIONS.
Inventors
- 👤 H Muraoka
- 👤 T Ohashi
- 👤 T Yasui
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 14:10
CPC Classifications
H; H10; H10P; H10P50/00; H10P50/60; H10P50/64; H10P50/642; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/019; H10W10/10; Y; Y10; Y10S; Y10S148/00; Y10S148/026; Y10S148/051; Y10S148/085
Claims Analysis
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References Cited (Backward Citations)
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-09-03 | 1977-03-05 | 1977-09-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-09-03 | 1981-03-05 | 1981-09-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-09-03 | 1985-03-05 | 1985-09-04 | $7700.00 | Window Closed / Lapsed |