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US3755654A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital decoding of retrospective pulse modulation

Assignee: International Business Machines Corp
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Filing: 1972-07-31
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Granted: 1973-08-28
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Expires: 1992-07-31
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Abstract

Abstract A digital system for decoding data encoded by retrospective pulse modulation, wherein binary ones and zeros are represented by a comparison of the space between a first and second mark with the space between a second and third mark. A counter accumulates a current count representative of the elasped time between the sensing of a first mark and a second mark. This count is stored in a register as the previous count while a new current count is accumulated representative of the elasped time between the sensing of the second mark and a third mark. Concurrent with the accumulation of the new current count, the ones complement of the previous count is loaded into a stepping counter, stepped until an end carry occurs, and then repeatedly reloaded and stepped until the new current count has been accumulated. If more than a predetermined number of end carries takes place during the accumulation of the new current count, a signal indicates that a long space is present between the second and third marks. The presence of absence of this signal, compared with its presence or absence after the second mark was sensed, is indicative of whether a binary one or a binary zero is represented.

Inventors

  • 👤 F Dellacato

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 00:06
CPC Classifications
G; G06; G06K; G06K7/00; G06K7/01; G06K7/016; G06K7/0166

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 244 words
A system for decoding data manifested by retrospective pulse modulated marks comprising: control generator means for generating stepping counter pulses at a frequency f and interval counter pulses at a frequency f/N; interval counting means connected to said control generator means and advanced by said interval counter pulses for accumulating a current count between a first mark and a second mark; register means connected to said interval counting means for storing said current count as a previous count while another current count is being accumulated be-tween the second mark and a third mark; stepping counter means connected to said register means and to said control generator means, said stepping counter means being repeatedly stepped with a number of stepping counter pulses equal to the previous count, said stepping counter means providing an output signal each time it has been stepped said number of pulses equal to the previous count; long space counter means connected to said stepping counter means for providing an output signal when the number of output signals from said stepping counter means has exceeded a predetermined number between two marks; output circuit means connected to said long space counter means for storing each output signal from said long space counter means and for providing at each mark, a first binary data output when the output of said long space counter means agrees with the output of said long space counter means stored in said data output circuit at the preceding mark.
Claim 2
Independent Claim 244 words
A system for decoding data manifested by retrospective pulse modulated marks comprising: control generator means for generating stepping counter pulses at a frequency f and interval counter pulses at a frequency f/N; interval counting means connected to said control generator means and advanced by said interval counter pulses for accumulating a current count between a first mark and a second mark; register means connected to said interval counting means for storing said current count as a previous count while another current count is being accumulated be-tween the second mark and a third mark; stepping counter means connected to said register means and to said control generator means, said stepping counter means being repeatedly stepped with a number of stepping counter pulses equal to the previous count, said stepping counter means providing an output signal each time it has been stepped said number of pulses equal to the previous count; long space counter means connected to said stepping counter means for providing an output signal when the number of output signals from said stepping counter means has exceeded a predetermined number between two marks; output circuit means connected to said long space counter means for storing each output signal from said long space counter means and for providing at each mark, a first binary data output when the output of said long space counter means agrees with the output of said long space counter means stored in said data output circuit at the preceding mark.
Claim 3
Independent Claim 277 words
A system for decoding data manifested by the relative spacing between retrospective pulse modulated marks, wherein the space between the first two marks in a series of marks defines a short space comprising: control generator means for generating stepping counter pulses at a frequency f and interval counter pulses at a frequency f/N; interval counting means connected to said control generator means and advanced by said interval counter pulses, said interval counting means being responsive to the sensing of said marks for accumulating a current count between a first mark and a second mark; register means connected to said interval counting means for storing said current count as a previous count while another current count is being accumulated between the second mark and a third mark; stepping counter means connected to said register means and said control generator means, said stepping counter means being repeatedly stepped with a number of said stepping counter pulses equals to the previous count, said stepping counter means providing an output signal each time it has been stepped said number of pulses equal to the previous count; long space counter means connected to said stepping counter means for providing an output signal when the number of output signals from said stepping counter means has exceeded a predetermined number between two marks; output circuit means connected to said long space counter means for storing each output signal from said long space counter means and for providing, at each mark, a first binary data output when the output of said long space counter means agrees with the output of said long space counter means stored in said data output circuit at the preceding mark.
Claim 4
Independent Claim 277 words
A system for decoding data manifested by the relative spacing between retrospective pulse modulated marks, wherein the space between the first two marks in a series of marks defines a short space comprising: control generator means for generating stepping counter pulses at a frequency f and interval counter pulses at a frequency f/N; interval counting means connected to said control generator means and advanced by said interval counter pulses, said interval counting means being responsive to the sensing of said marks for accumulating a current count between a first mark and a second mark; register means connected to said interval counting means for storing said current count as a previous count while another current count is being accumulated between the second mark and a third mark; stepping counter means connected to said register means and said control generator means, said stepping counter means being repeatedly stepped with a number of said stepping counter pulses equals to the previous count, said stepping counter means providing an output signal each time it has been stepped said number of pulses equal to the previous count; long space counter means connected to said stepping counter means for providing an output signal when the number of output signals from said stepping counter means has exceeded a predetermined number between two marks; output circuit means connected to said long space counter means for storing each output signal from said long space counter means and for providing, at each mark, a first binary data output when the output of said long space counter means agrees with the output of said long space counter means stored in said data output circuit at the preceding mark.
Claim 5
Dependent Claim 51 words
The system for decoding data as described in claim 2 further comprising: means for dividing said previous count stored in said register means by two, said means being operable in response to an output signal from said long space counter means after said register means is storing the latest previous count.
Claim 6
Dependent Claim 66 words
The system for decoding data as described in claim 2 wherein said register means includes a shift register in which said previous count is stored and further includes means operable in response to an output signal from long space counter means to shift said shift register for dividing said previous count stored therein by approximately two after said shift register is storing the latest previous count.
Claim 7
Independent Claim 286 words
A system for decoding data manifested by the relative spacing between retrospective pulse modulated marks, wherein the space between the first two marks in a series of marks defines a short space comprising: control generator means for generating stepping counter pulses at a frequency f and interval counter pulses at a frequency f/N; interval counting means connected to said control generator means and advanced by said interval counting pulses, said interval counting means being responsive to the sensing of said marks for accumulating a current count between a first mark and a second mark; register means connected to said interval counting means for storing said current count as a previous count while another current count is being accumulated between the second mark and a third mark; ones complementing means connected to said register means for providing the ones complement of said previous count; stepping counter means connected to said ones complementing means and said control generator means, said stepping counter means being repeatedly stepped with the ones complement of the previous count, said stepping counter means providing an output signal each time an end carry occurs in said stepping counter means; end carry counting means connected to said stepping counter means for providing an output signal when the number of output signals from said stepping counter means has exceeded a predetermined number between two marks; output circuit means connected to said end carry counter means for storing each output signal from said end carry counter means and for providing at each mark, a first binary data output when the output of said end carry counter means agrees with the output of said end carry counter means stored in said data output circuit at the preceding mark.
Claim 8
Independent Claim 286 words
A system for decoding data manifested by the relative spacing between retrospective pulse modulated marks, wherein the space between the first two marks in a series of marks defines a short space comprising: control generator means for generating stepping counter pulses at a frequency f and interval counter pulses at a frequency f/N; interval counting means connected to said control generator means and advanced by said interval counting pulses, said interval counting means being responsive to the sensing of said marks for accumulating a current count between a first mark and a second mark; register means connected to said interval counting means for storing said current count as a previous count while another current count is being accumulated between the second mark and a third mark; ones complementing means connected to said register means for providing the ones complement of said previous count; stepping counter means connected to said ones complementing means and said control generator means, said stepping counter means being repeatedly stepped with the ones complement of the previous count, said stepping counter means providing an output signal each time an end carry occurs in said stepping counter means; end carry counting means connected to said stepping counter means for providing an output signal when the number of output signals from said stepping counter means has exceeded a predetermined number between two marks; output circuit means connected to said end carry counter means for storing each output signal from said end carry counter means and for providing at each mark, a first binary data output when the output of said end carry counter means agrees with the output of said end carry counter means stored in said data output circuit at the preceding mark.
Claim 9
Independent Claim 467 words
A system for decoding data manifested by the relative spacing between retrospective pulse modulated marks, wherein the space between the first two marks in a series of marks defines a short space, comprising: mark sensing means providing an output in response to the sensing of a mark; control generator means for generating stepping counter pulses at a frequency f and interval counting pulses at a frequency f/N, said control generator means being further operable in response to the sensing of a mark for providing a single sequence of timing pulses; interval counting means connected to said control generator means operable in response to said sequence of timing pulses for accumulating a current count of said counting pulses representative of the interval between two marks; register means connected to said counting means and said control generator means operable in response to said sequence of timing pluses for storing a previous count of said interval counting means, said previous count being defined as the current count in said interval counting means immediately before said interval counting means is reset; stepping counter means connected to said register means and said control generator means operable in response to said sequence of timing signals for stepping the ones complement of said previous count stored in said register means with said stepping counter pulses, said stepping counter means being reloaded with the ones complement of said previous count stored in said register means each time an end carry occurs; end carry counting means connected to said control generator and said stepping counter means operable in response to said sequence of timing signals for counting the number of end carries performed by said stepping counter means, said end carry counting means providing an output signal when its contents have exceeded a predetermined number, said output signal shifting said register means for dividing the contents of said register means by approximately 2 after said register means has been loaded with the latest previous count; data output circuit means connected to said end carry counter means and said control generator means operable in response to said sequence of timing signals for storing the presence or absence of an output signal from said end carry means and being further operable in response to said sequence timing signals for providing a first binary data output when the present output of said end carry counter means agrees with the presence or absence of an output from said end carry means stored in said data output circuit means at the preceding sequence of timing signals, said data output circuit means further providing a second binary output when the present output of said end carry counter means disagrees with said output of said end carry counter means stored in said data output circuit means at the preceding sequence of timing pulses.
Claim 10
Independent Claim 467 words
A system for decoding data manifested by the relative spacing between retrospective pulse modulated marks, wherein the space between the first two marks in a series of marks defines a short space, comprising: mark sensing means providing an output in response to the sensing of a mark; control generator means for generating stepping counter pulses at a frequency f and interval counting pulses at a frequency f/N, said control generator means being further operable in response to the sensing of a mark for providing a single sequence of timing pulses; interval counting means connected to said control generator means operable in response to said sequence of timing pulses for accumulating a current count of said counting pulses representative of the interval between two marks; register means connected to said counting means and said control generator means operable in response to said sequence of timing pluses for storing a previous count of said interval counting means, said previous count being defined as the current count in said interval counting means immediately before said interval counting means is reset; stepping counter means connected to said register means and said control generator means operable in response to said sequence of timing signals for stepping the ones complement of said previous count stored in said register means with said stepping counter pulses, said stepping counter means being reloaded with the ones complement of said previous count stored in said register means each time an end carry occurs; end carry counting means connected to said control generator and said stepping counter means operable in response to said sequence of timing signals for counting the number of end carries performed by said stepping counter means, said end carry counting means providing an output signal when its contents have exceeded a predetermined number, said output signal shifting said register means for dividing the contents of said register means by approximately 2 after said register means has been loaded with the latest previous count; data output circuit means connected to said end carry counter means and said control generator means operable in response to said sequence of timing signals for storing the presence or absence of an output signal from said end carry means and being further operable in response to said sequence timing signals for providing a first binary data output when the present output of said end carry counter means agrees with the presence or absence of an output from said end carry means stored in said data output circuit means at the preceding sequence of timing signals, said data output circuit means further providing a second binary output when the present output of said end carry counter means disagrees with said output of said end carry counter means stored in said data output circuit means at the preceding sequence of timing pulses.
Claim 11
Dependent Claim 208 words
A process for decoding data manifested by the relative spacing between retrospective pulse modulated marks, wherein the space between the first two marks in a series of marks defines a short space, comprising the steps of: generating stepping counter pulses at a frequency f and interval counter pulses at a frequency f/N; sensing each mark; counting the number of interval counter pulses that occur between the sensing of a first mark and a second mark; storing said number of interval counter pulses as a previous count while another number of interval counter pulses which occur between the sensing of the second and a third is counted; counting the number of sequences of said stepping counter pulses that occur between the sensing of said second mark and said third mark, said sequence of said stepping counter pulses being defined as a number of said stepping counter pulses equal to said previous count; generating a long space output signal when the number of said sequences exceeds a predetermined number; storing said long space output signal when each mark is sensed; generating a first binary data output when the presence of a long space output signal compares with the presence of a long space output signal stored at the preceding mark.
Claim 12
Dependent Claim 208 words
A process for decoding data manifested by the relative spacing between retrospective pulse modulated marks, wherein the space between the first two marks in a series of marks defines a short space, comprising the steps of: generating stepping counter pulses at a frequency f and interval counter pulses at a frequency f/N; sensing each mark; counting the number of interval counter pulses that occur between the sensing of a first mark and a second mark; storing said number of interval counter pulses as a previous count while another number of interval counter pulses which occur between the sensing of the second and a third is counted; counting the number of sequences of said stepping counter pulses that occur between the sensing of said second mark and said third mark, said sequence of said stepping counter pulses being defined as a number of said stepping counter pulses equal to said previous count; generating a long space output signal when the number of said sequences exceeds a predetermined number; storing said long space output signal when each mark is sensed; generating a first binary data output when the presence of a long space output signal compares with the presence of a long space output signal stored at the preceding mark.
Claim 13
Dependent Claim 45 words
The process for decoding data as described in claim 7, comprising the additional step of: generating a first binary data output when the absence of a long space output signal compares with the absence of a long space output signal stored at the preceding mark.

References Cited (Backward Citations)

US3374475A Cited
US3708748A Cited
US3701886A Cited
US3701097A Cited
US3716699A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-08-27 1977-02-26 1977-08-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-08-27 1981-02-26 1981-08-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-08-27 1985-02-26 1985-08-28 $7700.00 Window Closed / Lapsed

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