US3754240A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Gain decision logic for integrating analog-to-digital converters
Assignee: International Business Machines Corp
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Filing: 1971-10-19
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Granted: 1973-08-21
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Expires: 1991-10-19
Abstract
Abstract Unknown analog signals are coupled through a selectable gain amplifier to an integrating analog-to-digital converter. A first analog-to-digital conversion cycle is performed which sequentially increments counters associated with the converter circuit while the amplifier gain is held at a preselected level. Logic circuitry responds to certain counts in those counters to select an optimum amplifier gain setting to be used during a second conversion cycle. The cycle amplifier gain setting and conversion result are accurately correlated to the amplitude of the unknown analog input. Identity between the gain decision and the first conversion cycle gain setting can be detected to bypass the second conversion cycle.
Inventors
- 👤 J Milton
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-26 00:05
CPC Classifications
H; H03; H03M; H03M1/00; H03M1/12; H03M1/50; H03M1/52
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
257 words
Apparatus for converting an unknown analog input signal into an equivalent digital representation comprising a variable gain amplifier coupled for receiving said unknown analog signal and including means for digitally selecting one of a plurality of gain settings for said amplifier, converter means coupled to the output of said amplifier for responding to a control signal for cyclically converting said amplifier output to a digital representation thereof by incrementing at least one counter during each said conversion cycle, control means for setting Said amplifier gain at a preselected value and for introducing a said control signal to said converter means for causing a first conversion cycle of said amplifier output, counting means having count positions each of which digitally correspond to one of the gain settings of said variable gain amplifier, detecting means responsive to preselected digital combinations in said converter counter for incrementing said counting means during said first conversion cycle, and said control means further including means for setting said gain selecting means of said amplifier in accordance with the count contained in said counting means at the end of said first conversion cycle and for introducing a control signal to said converter means for causing a second said conversion cycle of said amplifier output, whereby the combination of the result of said second conversion cycle and the count in said counting means at the end of said first conversion cycle represent the most accurate conversion of said unknown analog input within the operating capabilities of the combination of said amplifier and said converter means.
Claim 2
Dependent Claim
257 words
Apparatus for converting an unknown analog input signal into an equivalent digital representation comprising a variable gain amplifier coupled for receiving said unknown analog signal and including means for digitally selecting one of a plurality of gain settings for said amplifier, converter means coupled to the output of said amplifier for responding to a control signal for cyclically converting said amplifier output to a digital representation thereof by incrementing at least one counter during each said conversion cycle, control means for setting Said amplifier gain at a preselected value and for introducing a said control signal to said converter means for causing a first conversion cycle of said amplifier output, counting means having count positions each of which digitally correspond to one of the gain settings of said variable gain amplifier, detecting means responsive to preselected digital combinations in said converter counter for incrementing said counting means during said first conversion cycle, and said control means further including means for setting said gain selecting means of said amplifier in accordance with the count contained in said counting means at the end of said first conversion cycle and for introducing a control signal to said converter means for causing a second said conversion cycle of said amplifier output, whereby the combination of the result of said second conversion cycle and the count in said counting means at the end of said first conversion cycle represent the most accurate conversion of said unknown analog input within the operating capabilities of the combination of said amplifier and said converter means.
Claim 3
Dependent Claim
79 words
Apparatus in accordance with claim 1 which further includes means for comparing said preselected amplifier gain and the count in said counting means at the end of said first conversion cycle for providing an output signal indicative of identity therebetween, and means responsive to said comparing means output for preventing said second conversion cycle from being performed, whereby the result of said first conversion cycle can be immediately utilized upon detection of the presence of said comparing means output.
Claim 4
Dependent Claim
102 words
Apparatus in accordance with claim 1 wherein said counting means includes count positions constructed and arranged such that (a) a minimum count therein corresponds to the maximum gain setting for said amplifier, (b) a maximum count therein corresponds to the minimum gain setting for said amplifier, and (c) an intermediate count corresponds to a gain setting between the maximum and minimum gains of said amplifier. means responsive to preselected digital combinations in said converter counter for incrementing said counting means so that the count in said counting means at the end of said first conversion cycle corresponds to said optimum gain setting.
Claim 5
Dependent Claim
93 words
Apparatus in accordance with claim 3 wherein said converter means is a multi-ramp integrating converter utilizing a plurality of counters each associated with integration of respective reference voltages, said detecting means further including a plurality of detector circuits each coupled for responding to preselected counts in respective ones of said converter counters, and logic means for enabling the said detector circuits in the same sequence said converter counters are activated by said converter, the enabled said detector circuits responding to composite digital count patterns in said converter counters for incrementing said counting means.
Claim 6
Dependent Claim
72 words
Apparatus in accordance with claim 4 which further includes a clock pulse source, and a plurality of gate circuits each associated with a respective said detector circuit for coupling clock pulses from said source into said counting means in response to enabling signals produced by the output of said associated detector circuit and a signal indicative that a said detector circuit associated with a higher ordered said converter counter has been enabled.
Claim 7
Dependent Claim
67 words
Apparatus in accordance with claim 5 which further includes means for comparing said preselected amplifier gain and the count contained in said counting means at the end of said first conversion cycle for producing a signal indicative of identity therebetween, and means responsive to said comparing means output for indicating that said first conversion result can be utilized directly without the need for said second conversion cycle.
References Cited (Backward Citations)
US3299421A
Cited
US3582777A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-08-20 | 1977-02-19 | 1977-08-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-08-20 | 1981-02-19 | 1981-08-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-08-20 | 1985-02-19 | 1985-08-21 | $7700.00 | Window Closed / Lapsed |