US3753289A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process for manufacture of substrate supported semiconductive stack
Assignee: General Electric Co
•
Filing: 1970-11-02
•
Granted: 1973-08-21
•
Expires: 1990-11-02
Abstract
Abstract A plurality of junction containing semiconductive elements are bonded in series relation with semiconductive attachment elements of low resistivity bonded to opposite ends of the stack to form a semiconductive sub-assembly. The sub-assembly is bonded to metallized spaced lands with the junction containing elements spaced from the intervening surface of the substrate. Electrical conductors are bonded to the metallized lands in spaced relation to the semiconductive sub-assembly. The sub-assembly is etched in position on the lands and thereafter encapsulated with a passivant without intermediate handling. A plastic casement is molded around the sub-assembly and passivant. A plurality of substrates are initially integrally associated.
Inventors
- 👤 W Berner
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 13:12
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/40; H10W70/479; H10W74/00; H10W74/10; H10W74/111; H10W74/121; H10W90/00; Y; Y10; Y10S; Y10S148/00; Y10S148/02; Y10S148/028
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
69 words
A process comprising bonding to spaced interconnection surfaces of a semiconductive means low resistivity semiconductive elements to form a semiconductive sub-assembly, bonding the semiconductive elements to spaced lands of an insulative substrate configured to engage only the semiconductive elements to remain free of contact with remaining portions of the semiconductive sub-assembly, etching the semiconductive means, conductively associating lead means with the semiconductive elements, and protectively encapsulating the semiconductive means.
Claim 2
Dependent Claim
69 words
A process comprising bonding to spaced interconnection surfaces of a semiconductive means low resistivity semiconductive elements to form a semiconductive sub-assembly, bonding the semiconductive elements to spaced lands of an insulative substrate configured to engage only the semiconductive elements to remain free of contact with remaining portions of the semiconductive sub-assembly, etching the semiconductive means, conductively associating lead means with the semiconductive elements, and protectively encapsulating the semiconductive means.
Claim 3
Dependent Claim
33 words
A process according to claim 1 in which the semiconductive means is formed by bonding a plurality of junction containing semiconductive elements in series relation concurrently with bonding the low resistivity semiconductive elements.
Claim 4
Dependent Claim
31 words
A process according to claim 1 in which the semiconductive elements are bonded to the lands at a temperature below that employed to bond the semiconductive elements to the semiconductive means.
Claim 5
Dependent Claim
53 words
A process according to claim 1 additionally including the steps of sub-dividing a plurality of semiconductive sub-assemblies from a stack of semiconductive wafers, bonding the sub-assemblies to a plurality of integrally and separately related substrates, etchIng the semiconductive means while the substrates remain integrally related, and thereafter separating the substrates into discrete substrates.
References Cited (Backward Citations)
US2798989A
Cited
US3503125A
Cited
US3333324A
Cited
US3355636A
Cited
US3383760A
Cited
US3497947A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-08-20 | 1977-02-19 | 1977-08-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-08-20 | 1981-02-19 | 1981-08-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-08-20 | 1985-02-19 | 1985-08-21 | $7700.00 | Window Closed / Lapsed |