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US3751688A Expired / Lapsed US ⏱️ 0.0 years remaining

Erasing circuit for use in a display tube provided with a storage screen

Assignee: US Philips Corp
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Filing: 1971-12-23
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Granted: 1973-08-07
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Expires: 1991-12-23
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Abstract

Abstract the entire peak-topeak voltage range, by capacitive coupling, the amplifier element being switched off, being saturated or retaining a constant voltage and hence being protected against excessive voltages. It should be borne in mind that the positive-going and the negative-going sudden voltage variations must be associated with a given RC time constant to enable adequate erasure. The time constants are to be determined for both polarities having regard to the protecting means, the adjusting resistors and the one fixed capacitor. To erase the information on a storage screen of a display tube there must be applied to the tube sudden potential variations which may have values of several hundreds of volts. By using a low-voltage transistor in emitter-follower connection in conjunction with transistor protective means and an appropriate RC time determination both the normal bias voltage and the sudden high-voltage potential variations may be applied to the tube. This erasing circuit may be used in storage oscilloscopes. The invention relates to an erasing circuit for use in a display tube provided with a storage screen, which circuit comprises a direct-voltage supply source connected between the storage screen and the cathode circuit for storing information on the screen and a first capacitor one electrode of which is connected to a square-wave voltage supply source, the co-operation of the capacitor and of resistors producing an erasing voltage which is the differential of the square-wave voltage and is superposed on the voltage from the direct-voltage supply source and which erases the information on the screen. It is known to use cathode ray tubes to display electric information. By deflecting an electron beam emitted from a cathode charges may locally be stored on a display screen or the screen may be caused to emit light. In general, in oscilloscope and television technology display tubes are used which have a display screen which emits light only when the electron beam strikes the screen, and in some cases a screen exhibiting afterglow is used. However, if the oscillogram or the information is to be stored for a prolonged period of time and hence the screen must exhibit after-flow for a very long period, a given type of storage screen may be used in conjunction with a special tube construction. A tube of such type may be provided with a writing gun, i.e., a system which provides the controllable writing beam, at least one holding gun capable of emitting a uniform stream of electrons to the entire screen, and a special screen comprising a glass plate which is coated with a thin conductive layer which in turn is coated with a dielectric layer of, for example, a phosphor. Depending upon the energy which the electrons have when striking the phosphor layer the secondary emission factor of the layer is smaller or greater than unity. This energy depends not only on the voltage between the cathodes and the conductive layer but also, owing to the insulating properties of the dielectric layer, on the charge present on the layer. If the emission factor is less than unity, a negative charge is collected on the screen which is supplied from the continuously spraying holding guns, and the layer assumes cathode potential. The screen is dark, no light is emitted and hence information may be written in. For this purpose the writing gun provides a beam of high-energy electrons, for its cathode is at a high negative potential of several thousands of volts relative to the screen. At the points of impact on the screen the emission factor is greater than unity, so that a positive charge builds up. At these points the phosphor emits light, so that the oscillogram or the information becomes visible. The positive charGe attracts stray electrons which are given an energy such that the emission factor still remains greater than unity, so that after the collapse of the writing beam the information remains visible. Thus, a store in produced. To clear this store the local charge differences must be equalized or the charges must be discharged. It is known to use an erasing circuit for this purpose. One of the effects of the known erasing circuit is that the correct bias voltage between the spraying cathode and the conductive layer on the screen is adjusted and maintained. For this purpose a tube circuit is used which represents a direct voltage supply having a low internal resistance and is generally referred to as cathode follower. The anode of the tube used is connected to a supply source of a voltage of about 500 Volts, its grid is connected through a resistor to a voltage divider having a range between 150 V and 250 V, and its cathode is connected through a resistor to the common lead to which the spraying cathode also is connected and on the other hand to the conductive layer on the screen. To enable the image on the screen to be erased the screen must be brought to a high positive potential for a given time so that the emission factor for the entire dielectric layer becomes greater than unity and hence the entire layer is given a positive charge and the entire screen emits light: equalization of the charge, after which this charge is removed, and a negative charge is applied to the layer in that the conductive layer is temporarily brought to a low potential or to zero potential relative to the spraying cathode. The sudden positive- and negative-going voltage variations which may be superimposed on the bias voltage must be of sufficient duration to equalize the entire screen in respect of charges. For present-day storage tubes this time must be of the order of from 50 to 150 milliseconds. The known circuit uses sudden voltage variations which decrease exponentially and are obtainable by differentiating a square-wave voltage via a capacitance-resistance network. For this purpose one electrode of a capacitor is connected to the grid of the tube and the other electrode is connected to a change-over switch which has a rest position, in which it establishes a connection to the common line, and an operative position, in which it etablishes a connection to a potential of, say, +250 V. The combination of the various resistors included in the grid circuit and the capacitor produces an RC time of a duration sufficient for the erasing process. By changing over the switch to the operative position a sudden voltage variation of + 250 V is produced at the grid and hence at the cathode and at the screen. This voltage exponentially decreases to the initial screen bias voltage. By returning the switch to the rest position a negative-going voltage variation is produced. Because of the tendency to reduce the size, the weight and the power dissipation of apparatus semiconductor elements will be employed at all points where their use is possible. Furthermore endeavors should be made to reduce the cost of the apparatus. A disadvantage of the known erasing circuit consists in the use of a tube, which is comparatively bulky, and together with its high voltage and filament-current supply devices is heavy and dissipates a considerable amount of power. Substituting a transistor for the tube does not remove all these disadvantages: it still requires a high-voltage supply and the cost of such a high-voltage transistor is considerable. The erasing circuit according to the invention obviates all these difficulties. Only one cheap low-voltage transistor is required, and the supply voltage may be halved, for example from 500 V to 250 V. For this purpose an erasing circuit according to the invention is characterized in that the direct-volTage supply source includes an emitter follower circuit the emitter circuit of which is connected between the storage screen and the cathode circuit and which includes at least one transistor the maximum permissible collector-emitter voltage of which is smaller than the sum of the direct voltage and the peak value of the erasing voltage. Means are provided to protect the emitter follower circuit against excessive voltages, while the point of the circuit to which the other electrode of the first capacitor is connected is chosen so that the resistors together with the capacitor and in conjunction with the said means provide the appropriate time constants. The various embodiments of the invention are based on the recognition that sudden voltage variations are obtainable by superposition on the bias direct voltage, without an amplifier element being required to be driven through

Inventors

  • 👤 R Hooghordel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-26 01:17
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; G; G01; G01R; G01R13/00; G01R13/20; G01R13/22; G01R13/225; G09; G09G; G09G1/00; G09G1/26; G11; G11C; G11C11/00; G11C11/21; G11C11/23

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 241 words
An erasing circuit for use in a display tube provided with a storage screen and a cathode circuit, comprising a DC voltage source, a potentiometer connected in parallel with the DC voltage source, a transistor having a base, an emitter and a collector, means connecting the potentiometer to the base of the transistor, a resistor, means connecting the emitter of the transistor to the DC voltage source through the resistor, means connecting the cathode circuit of the display tube to the side of the DC voltage supply connected to the emitter of the transistor, means connecting the collector of the transistor to a side of the DC voltage supply remote from the emitter of the transistor, a square wave voltage supply, a capacitor, means connecting the square wave voltage supply to the base of the transistor through the capacitor, whereby the capacitor and the potentiometer provide a circuit for applying the differential of the square wave to the base of the transistor thereby superimposing the differential of the square wave voltage on the potential from the DC voltage source, the maximum permissable collector-emitter voltage of the transistor being smaller than the sum of the direct voltage from the DC voltage source and the peak value of the differentiated square wave, means connected to the collector of the transistor for protecting the transistor against excessive voltages, and means connecting the emitter of the transistor to the storage screen of the display tube.
Claim 2
Dependent Claim 241 words
An erasing circuit for use in a display tube provided with a storage screen and a cathode circuit, comprising a DC voltage source, a potentiometer connected in parallel with the DC voltage source, a transistor having a base, an emitter and a collector, means connecting the potentiometer to the base of the transistor, a resistor, means connecting the emitter of the transistor to the DC voltage source through the resistor, means connecting the cathode circuit of the display tube to the side of the DC voltage supply connected to the emitter of the transistor, means connecting the collector of the transistor to a side of the DC voltage supply remote from the emitter of the transistor, a square wave voltage supply, a capacitor, means connecting the square wave voltage supply to the base of the transistor through the capacitor, whereby the capacitor and the potentiometer provide a circuit for applying the differential of the square wave to the base of the transistor thereby superimposing the differential of the square wave voltage on the potential from the DC voltage source, the maximum permissable collector-emitter voltage of the transistor being smaller than the sum of the direct voltage from the DC voltage source and the peak value of the differentiated square wave, means connected to the collector of the transistor for protecting the transistor against excessive voltages, and means connecting the emitter of the transistor to the storage screen of the display tube.
Claim 3
Dependent Claim 113 words
An erasing circuit as claimed in claim 1, wherein the capacitor is directly connected to the base of the transistor, wherein the means connecting the collector of the transistor to the DC voltage supply comprises a resistor, and wherein the protection means comprises a second capacitor having one electrode connected to the collector of the transistor and having the other electrode connected to the square wave voltage supply, the time constant of the first capacitor and the associated resistors being at least equal to the time constant of the second capacitor and the parallel combination of the emitter circuit equivalent resistors and the resistor connected between the collector and the DC voltage source.
Claim 4
Dependent Claim 65 words
An erasing circuit as claimed in claim 1, wherein the means connecting the cathode circuit of the display tube to the DC supply comprises a second resistor, wherein the squAre wave voltage source is connected to the base of the transistor through the capacitor and the potentiometer, and wherein the means for protecting the transistor comprises a low internal resistance of the DC voltage source.
Claim 5
Dependent Claim 135 words
An erasing circuit as claimed in claim 1, wherein the protection means comprises a second resistor connecting the emitter of the transistor to the DC voltage source, a third resistor connecting the base of the transistor to the potentiometer, a diode connecting the emitter of the transistor to the first resistor and having a low resistance conduction path in the direction of conduction through the emitter of the transistor, a fourth resistor, a second diode connected in series with the fourth resistor, means connecting the side of the diode remote from the fourth resistor to the side of the third resistor remote from the base of the transistor, and means connecting the side of the fourth resistor remote from the diode to the side of the first diode remote from the emitter of the transistor.
Claim 6
Dependent Claim 112 words
An erasing circuit as claimed in claim 1, wherein the protection means comprises a second resistor connecting the collector of the transistor to the DC voltage source, a diode connected in parallel with the base-collector path of the transistor, the diode having the same forward direction of conduction as the base-collector diode of the transistor and having a reverse breakdown voltage below the maximum permissable base-collector voltage of the transistor, the means connecting the base of the transistor to the potentiometer comprising a third resistor, and wherein the side of the capacitor remote from the square wave voltage supply is connected to the side of the third resistor remote from the potentiometer.

References Cited (Backward Citations)

US2946917A Cited
US3090887A Cited
US3383546A Cited
US3426237A Cited
US3651489A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-08-06 1977-02-05 1977-08-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-08-06 1981-02-05 1981-08-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-08-06 1985-02-05 1985-08-07 $7700.00 Window Closed / Lapsed

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