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US3750044A Expired / Lapsed US ⏱️ 0.0 years remaining

Graphic equalizer circuit

Assignee: INTERN RADIO AND ELECTRONICS COR
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Filing: 1972-05-22
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Granted: 1973-07-31
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Expires: 1992-05-22
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Abstract

Abstract A graphic equalizer system for an audio amplifier system includes an input circuit for adjusting bass and treble boost and the corner frequencies thereof. The input circuit is coupled to a graphic equalizer network which in one branch includes a main amplifier connected between input and output terminals. Another branch includes a resistive voltage divider connected in series between input and output terminals and having multiple outputs for connection by a crossbar switch to any of a plurality of tuned active filter circuits each of which is tunable to a different frequency. The outputs of the filter circuits are coupled to a summing amplifier for connection to the input of the main amplifier of the graphic equalizer network.

Inventors

  • 👤 G Stanley

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 08:43
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/181; H03F3/183; H03G; H03G5/00; H03G5/02; H03G5/025

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 106 words
A graphic equalizer system for the signal range of an audio amplifier system having a signal translating path with an input and output including in combination: circuit means including a first variable element for adjusting the amplitude of a first band of frequencies having a corner frequency displaced from the center frequency of the signal range and a second variable element for adjusting said corner frequency of said first band, and a graphic equalizer network cascaded with said circuit means between the input and the output for adjusting the amplitude of selected frequencies of a narrower bandwidth than the band of frequencies of said first band.
Claim 2
Dependent Claim 106 words
A graphic equalizer system for the signal range of an audio amplifier system having a signal translating path with an input and output including in combination: circuit means including a first variable element for adjusting the amplitude of a first band of frequencies having a corner frequency displaced from the center frequency of the signal range and a second variable element for adjusting said corner frequency of said first band, and a graphic equalizer network cascaded with said circuit means between the input and the output for adjusting the amplitude of selected frequencies of a narrower bandwidth than the band of frequencies of said first band.
Claim 3
Dependent Claim 52 words
The graphic equalizer system according to claim 1 wherein said circuit means includes a variable impedance connected to said signal translating path for controlling the amplitude of said first band of frequencies and variable capacitor means connected thereto for adjusting the corner frequency of the range of said first band of frequencies.
Claim 4
Dependent Claim 16 words
The graphic equalizer system according to claim 2 wherein said variable impedance comprises a variable resistor.
Claim 5
Dependent Claim 138 words
The graphic equalizer system according to claim 1 wherein said first variable element is a first variable impedance in said signal translating path for controlling the amplitude of said first band of frequencies, the same having a corner frequency below the center frequency of the signal range, said second variable element is a first variable capacitor coupled to said first variable impedance means for adjusting the corner frequency of said first band of frequencies, and said circuit means further including a second variable impedance coupled to said first variable impedance and first variable capacitor for controlling the amplitude of a second band of frequencies having a corner frequency above the center frequency of the signal range, and a second variable capacitor coupled to said second variable impedance for adjusting the corner frequency of said second band of frequencies.
Claim 6
Dependent Claim 168 words
The graphic equalizer system according to claim 1 wherein said graphic equalizer network includes a resistance voltage divider coupled between the input of said graphic equalizer network and the output of the system and having multiple outputs at various resistance values between said graphic equalizer network input and said output of the system, a plurality of filter circuits each having a different passband of frequencies of said narrower bandwidth, switch means for coupling the input of any of said filter circuits to any of said voltage divider outputs, amplifier means coupled between said input of said graphic equalizer neTwork and the output of the system, feedback resistance means coupled between the output of the system and the input of said amplifier means, resistance means coupled between the input of said graphic equalizer network and the input of said amplifier means, and means coupled with the outputs of said filter circuits for combining the signals appearing thereon and applying such combined signals to the input of said amplifier means.
Claim 7
Dependent Claim 16 words
The graphic equalizer system according to claim 5 wherein said switch means comprises a crossbar switch.
Claim 8
Dependent Claim 16 words
The graphic equalizer system according to claim 5 wherein said filter circuits have adjustable center frequencies.
Claim 9
Dependent Claim 197 words
A graphic equalizer network having an input and an output and including in combination: means for applying signals having a predetermined frequency range to the input of said graphic equalizer network; amplifier means having an input and an output; first impedance means coupled between the input of the graphic equalizer network and the input of said amplifier means, the output of said amplifier coupled with the output of the graphic equalizer network; second feedback impedance means coupled between the output of said amplifier and the input thereof; a resistive voltage divider coupled between the input of said graphic equalizer network and the output thereof and having multiple outputs at various resistance values between such graphic equalizer network input and output; a plurality of active filter circuits each having a different passband of frequencies of a narrower bandwidth than said predetermined frequency range of signals applied to the input of said graphic equalizer network; means for coupling the inputs of said active filter circuits to said voltage divider outputs; and means coupled with the outputs of said active filter circuits for combining the signals appearing thereon and applying such combined signals to the input of said amplifier means.
Claim 10
Dependent Claim 197 words
A graphic equalizer network having an input and an output and including in combination: means for applying signals having a predetermined frequency range to the input of said graphic equalizer network; amplifier means having an input and an output; first impedance means coupled between the input of the graphic equalizer network and the input of said amplifier means, the output of said amplifier coupled with the output of the graphic equalizer network; second feedback impedance means coupled between the output of said amplifier and the input thereof; a resistive voltage divider coupled between the input of said graphic equalizer network and the output thereof and having multiple outputs at various resistance values between such graphic equalizer network input and output; a plurality of active filter circuits each having a different passband of frequencies of a narrower bandwidth than said predetermined frequency range of signals applied to the input of said graphic equalizer network; means for coupling the inputs of said active filter circuits to said voltage divider outputs; and means coupled with the outputs of said active filter circuits for combining the signals appearing thereon and applying such combined signals to the input of said amplifier means.
Claim 11
Dependent Claim 38 words
The combination according to claim 8 wherein said means for coupling the inputs of said filter circuits to said voltage divider outputs comprises a crossbar switch for coupling any such input to any of said voltage divider outputs.
Claim 12
Dependent Claim 47 words
The combination according to claim 9 wherein said voltage divider includes first and second sets of matched resistors connected in series between the input and output of the graphic equalizer network, with the total resistance of each of said sets equalling the total resistance of the other.
Claim 13
Dependent Claim 14 words
The combination according to claim 8 wherein said active filters have adjustable center frequencies.
Claim 14
Dependent Claim 58 words
The combination according to claim 11 wherein said means coupled with the outputs of said filter circuits for combining the signals appearing thereon comprises a summing amplifier, with the outputs of said filter circuits being coupled in common to the input of said summing amplifier and the output thereof being connected to the input of said amplifier means.
Claim 15
Dependent Claim 17 words
The combination according to claim 12 further including means for changing the gain of said summing amplifier.

References Cited (Backward Citations)

US2907838A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-07-30 1977-01-29 1977-07-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-07-30 1981-01-29 1981-07-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-07-30 1985-01-29 1985-07-31 $7700.00 Window Closed / Lapsed

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