Frequency discriminator and phase detector circuit

Claim 2

Apparatus for comparing the frequency and phase of a first ac signal with the frequency and phase of a second a-c signal comprising: first and second flip-flops, means for averaging the difference between first and second output waveforms of said respective first and second flip-flops to produce a d-c signal proportional to said difference with a polarity corresponding to the sign of said difference, where the amplitude and polarity is the same for both waveforms; and means responsive to said first and second a-c signals for setting and resetting said first and second flip-flops continuously in a cyclic pattern and for causing one of said first and second flip-flops to be in a set state a greater period of time out of each cycle of one of said first and second signals in proportion to the extent to which one of said first and second signals differs from the other in frequency and phase wherein which of said first and second flip-flops will be set a greater period of time out of each cycle of one of said first and second signals depends upon the relationship between said first and second signals in frequency and phaSe.

Claim 3

Apparatus as defined in claim 1 wherein said last named means comprises: means for resetting said first and second flip-flops in response to the beginning of each cycle of said first signal; and means for setting said first and second flip-flops in response to the beginning and center of each cycle of said second signal, respectively, following each resetting operation by said resetting means in response to said first signal.

Claim 4

Apparatus as defined in claim 2 wherein said resetting means comprises: a reset control means in each of said first and second flip-flops responsive to pulses of a given voltage characteristic; and means responsive to said first signal for producing a pulse of said given voltage characteristic in synchronism with the zero-crossover time of said first signal in a predetermined direction from a given polarity.

Claim 5

Apparatus as defined in claim 3 wherein said setting means comprises: a set control means in each of said first and second flip-flops responsive to the leading edge of pulses of a given voltage characteristic; means responsive to said second signal for producing a squarewave signal of the same frequency and phase of said second signal and a complementary squarewave signal; means for applying said squarewave signal directly to said set control means of said second flip-flop, and means for applying said complementary squarewave signal to said set control means of said first flip-flop.

Claim 6

Apparatus as defined in claim 4 wherein said averaging means is connected to said first and second flip-flops to average the difference between the true output signal of said first flip-flop and the complementary output signal of said second flip-flop.

Claim 7

Apparatus as defined in claim 1 wherein said last named means comprises: set control means in said first flip-flop responsive to pulses of a given voltage characteristic for setting said first flip-flop, set control means in said second flip-flop responsive to pulses of said given voltage characteristic for setting said second flip-flop, reset control means in said first flip-flop responsive to pulses of said given voltage characteristic to reset said first flip-flop except when action has already been started to set said first flip-flop by a pulse in said set control means thereof; reset control means in said second flip-flop responsive to pulses of said given voltage characteristic to reset said second flip-flop except when action has already been started to set said second flip-flop by a pulse in said set control means thereof, means responsive to said first a-c signal for producing a first train of pulses of said given voltage characteristic, one pulse at the beginning of each cycle of said first a-c signal; means responsive to said second a-c signal for producing a second train of pulses of said given voltage characteristic, one pulse at the beginning of each cycle of said second a-c signal; means directly coupling said first and second trains to respective set control means of said first and second flip-flops; means responsive to corresponding output terminals of said first and second flip-flops for producing a reset control pulse of said given voltage characteristic when one of said first and second flip-flops is set in response to a pulse from one of said first and second trains of pulses after the other flip-flop has already been set; and means for applying said reset control pulse to said reset control means of both of said first and second flip-flops to immediately reset the flip-flop previously set while allowing the flip-flop that has just been set to remain set.

Claim 8

Apparatus as defined in claim 6 wherein said means for producing said reset control pulse comprises: a first gating means connected to said first and second flip-flops for producing a reset enable signal when both of said first and second flip-flops are set; a second gating means connected to said means for prodUcing said first train of pulses and to said means for producing said second train of pulses for combining said first and second trains into a third train of pulses; and a third gating means for transmitting a pulse of said third train to said reset control means of said first and second flip-flops in response to said reset enable signal.

Claim 9

Apparatus for comparing the frequency and phase of a first a-c signal with the frequency and phase of a second a-c signal comprising: a first flip-flop having a reset control means for resetting said first flip-flop in response to pulses of a given polarity and a set control means for setting said first flip-flop in response to the leading edge of pulses of said given polarity; a second flip-flop having a reset control means for resetting said second flip-flop in response to pulses of a given polarity and a set control means for setting said second flip-flop in response to the leading edge of pulses of said given polarity; first and second means for producing respective first and second rectangular waveforms from said first and second a-c signals; means responsive to said first rectangular waveform for producing sharp pulses of said given polarity at the beginning of each cycle of said first rectangular waveform; means for applying said second rectangular waveform to said set control means of said second flip-flop; inverting means for applying the complement of said second rectangular waveform to said set control means of said first flip-flop; and means for averaging the difference between first and second output waveforms of said respective first and second flip-flops to produce a d-c signal proportional to said difference.

Claim 10

Apparatus for comparing the frequency and phase of a first a-c signal with the frequency and phase of a second a-c signal comprising: a first flip-flop having a reset control means for resetting said first flip-flop in response to pulses of a given polarity and a set control means for setting said first flip-flop in response to the leading edge of pulses of said given polarity; a second flip-flop having a reset control means for resetting said second flip-flop in response to pulses of a given polarity and a set control means for setting said second flip-flop in response to the leading edge of pulses of said given polarity; first and second means for producing respective first and second rectangular waveforms from said first and second a-c signals; means responsive to said first rectangular waveform for producing sharp pulses of said given polarity at the beginning of each cycle of said first rectangular waveform; means for applying said second rectangular waveform to said set control means of said second flip-flop; inverting means for applying the complement of said second rectangular waveform to said set control means of said first flip-flop; and means for averaging the difference between first and second output waveforms of said respective first and second flip-flops to produce a d-c signal proportional to said difference.

Claim 11

Apparatus as defined in claim 8 where said first output waveform is the true output waveform of said first flip-flop and said second output waveform is the complementary output waveform of said second flip-flop.

Claim 12

Apparatus for comparing the frequency and phase of a first a-c signal with the frequency and phase of a second a-c signal comprising: a first flip-flop having a reset control means for being reset in response to pulses of a given polarity and a set control means for being set in response to pulses of said given polarity; a second flip-flop having a reset control means for being reset in response to pulses of a given polarity and a set control means for being set in response to pulses of said given polarity; first and second means for producing respective first and second trains of pulses from said first and second a-c signals, said pulses marking the beginning of cycles said respective first and second a-c signals, where said beginning is selected to be a zero-crossover of said respective first and second a-c signals from a given polarity to the opposite polarity; means for applying said first and second trains of pulses to respective set control means of said first and second flip-flops; means for combining said first and second train of pulses to form a third train of pulses having a pulse in time coincidence with each pulse of both said first and said second trains; means for gating a pulse from said third train of pulses to said reset control means of both of said first and second flip-flops immediately upon both of said first and second flip-flops being set, said pulse thus gated being in time coincidence with a pulse in one of said first and second trains of pulses, which pulse causes the setting of the last of said first and second flip-flops to be set; and means for averaging the difference between first and second output waveforms of said respective first and second flip-flops to produce a d-c signal proportional to said difference.

Claim 13

Apparatus for comparing the frequency and phase of a first a-c signal with the frequency and phase of a second a-c signal comprising: a first flip-flop having a reset control means for being reset in response to pulses of a given polarity and a set control means for being set in response to pulses of said given polarity; a second flip-flop having a reset control means for being reset in response to pulses of a given polarity and a set control means for being set in response to pulses of said given polarity; first and second means for producing respective first and second trains of pulses from said first and second a-c signals, said pulses marking the beginning of cycles said respective first and second a-c signals, where said beginning is selected to be a zero-crossover of said respective first and second a-c signals from a given polarity to the opposite polarity; means for applying said first and second trains of pulses to respective set control means of said first and second flip-flops; means for combining said first and second train of pulses to form a third train of pulses having a pulse in time coincidence with each pulse of both said first and said second trains; means for gating a pulse from said third train of pulses to said reset control means of both of said first and second flip-flops immediately upon both of said first and second flip-flops being set, said pulse thus gated being in time coincidence with a pulse in one of said first and second trains of pulses, which pulse causes the setting of the last of said first and second flip-flops to be set; and means for averaging the difference between first and second output waveforms of said respective first and second flip-flops to produce a d-c signal proportional to said difference.