← Back to Patent Explorer
US3746997A Expired / Lapsed US ⏱️ 0.0 years remaining

Adaptive digital frequency discriminator

Assignee: Iowa State University Research Foundation Inc
•
Filing: 1971-11-16
•
Granted: 1973-07-17
•
Expires: 1991-11-16
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract First and second digital filters having similar transfer characteristics are arranged to have their center frequencies tuned to either side of a composite center frequency so that their characteristics are symmetrical relative to that composite center frequency. The digital filters receive a common input signal known to vary slightly in frequency; and each filter generates an output signal representative of the component of the input signal within its bandwidth. The output signals of the filters are detected and one is subtracted from the other to generate an error signal which is representative of the difference between the frequency component of the input signal and the composite center frequency of the digital filters. A feedback loop varies the sampling rate of digital filters to minimize the error signal, indicating that the composite center frequency of the digital filters is equal to the frequency of the input signal. The system thus tracks the frequency of the input signal.

Inventors

  • 👤 R Willett
  • 👤 D Passeri

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-25 16:56
CPC Classifications
H; H03; H03J; H03J7/00; H03J7/02; H03J7/04

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 117 words
A system for frequency discrimination comprising: first and second digital filters each having a variable sampling rate, the center frequency of the pass-band of each of said filters being displaced in frequency from a composite center frequency of both of said filters, said filters further receiving an input signal to be tracked; difference means receiving the output signals of said first and second digital filters for generating an error signal representative of the difference between said Output signals; and means for varying the sampling interval of said first and second digital filter means in accordance with said error signal to cause said composite center frequency of said first and second digital filters to track said input signal.
Claim 2
Independent Claim 117 words
A system for frequency discrimination comprising: first and second digital filters each having a variable sampling rate, the center frequency of the pass-band of each of said filters being displaced in frequency from a composite center frequency of both of said filters, said filters further receiving an input signal to be tracked; difference means receiving the output signals of said first and second digital filters for generating an error signal representative of the difference between said Output signals; and means for varying the sampling interval of said first and second digital filter means in accordance with said error signal to cause said composite center frequency of said first and second digital filters to track said input signal.
Claim 3
Dependent Claim 72 words
The system of claim 1 wherein said last named means includes a voltage control oscillator circuit having a design frequency and being controlled to shift its frequency of oscillation in response to changes in said error signal; said system further including clock pulse generator means receiving the output signal of said voltage controlled oscillator means for generating sampling pulses to control the sampling rate of said first and second digital filter means.
Claim 4
Dependent Claim 50 words
The system of claim 1 further comprising integrator means for integrating said error signal, said last named means including voltage controlled oscillator means having a design frequency and controlled by the output signal of said integrator means to change the sampling rate of said first and second digital filter means.
Claim 5
Dependent Claim 87 words
The system of claim 1 further comprising first and second digital to analog converter means receiving respectively the output signals of said first and second digital filter means for generating analog signals representative of the respective outputs thereof; first and second detector circuit means receiving respectively the outputs of said first and second digital to analog converter circuit means; and a summing amplifier having a positive and a negative input receiving respectively the outputs of said first and second detector circuit means to generate said error signal.
Claim 6
Independent Claim 107 words
A method of tracking the frequency of an input signal comprising feeding said signal to first and second digital filters each having a variable sampling rate and a pass-band with a center frequency respectively above and below a composite center frequency by an equal amount, each filter generating a signal representaive of the amplitude of the input signal within its associated pass-band, taking the difference of the output signals of said filters to generate an error signal representative of the difference between the frequency of said input signal and said composite center frequency, and changing the sampling rate of said filters in accordance with said error signal.
Claim 7
Independent Claim 107 words
A method of tracking the frequency of an input signal comprising feeding said signal to first and second digital filters each having a variable sampling rate and a pass-band with a center frequency respectively above and below a composite center frequency by an equal amount, each filter generating a signal representaive of the amplitude of the input signal within its associated pass-band, taking the difference of the output signals of said filters to generate an error signal representative of the difference between the frequency of said input signal and said composite center frequency, and changing the sampling rate of said filters in accordance with said error signal.
Claim 8
Dependent Claim 33 words
The method of claim 5 further comprising the step of integrating said error signal prior to said step of changing said sampling rates, thereby to drive said error signal to zero with feedback.

References Cited (Backward Citations)

US3248659A Cited
US3281698A Cited
US3629509A Cited
US3614639A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-07-16 1977-01-15 1977-07-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-07-16 1981-01-15 1981-07-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-07-16 1985-01-15 1985-07-17 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag