Method of and circuit means for detecting and responding to rate of change of speed

Claim 3

A method according to claim 1, and further comprising the step of electrically shaping the first electrical pulses in order to develop corresponding pulses of a squared wave form configuration.

Claim 4

A method according to claim 2, wherein said step of shaping the first electrical pulses is performed immediately prior to producing said control voltage.

Claim 5

A method according to claim 2, wherein said squared wave pulses are employed to cyclically switch related switching means to and from a conductive state in order to thereby produce a related saw-tooth like intermediate output voltage, and wherein said control voltage is determined directly from the value of said saw-tooth like intermediate output voltage.

Claim 6

Circuit means for detecting and responding to the rate of change of speed, comprising first means for creating first electrical pulses in a relationship of timed frequency with respect to said speed, second means for developing a control voltage of a value related to said frequency of said first electrical pulses, third means for receiving said control voltage, said third means comprising first and second portions each of which has said control voltage applied thereto, output means for developing an electrical output to be applied to related receiving means, said output means being maintained in a first state whenever said first and second portions sense the same value of said control voltage, and additional means effective for at least temporarily preventing one of said first and second portions from sensing the changing value of said control voltage as the value of said speed is undergoing a change.

Claim 7

Circuit means for detecting and responding to the rate of change of speed, comprising first means for creating first electrical pulses in a relationship of timed frequency with respect to said speed, second means for developing a control voltage of a value related to said frequency of said first electrical pulses, third means for receiving said control voltage, said third means comprising first and second portions each of which has said control voltage applied thereto, output means for developing an electrical output to be applied to related receiving means, said output means being maintained in a first state whenever said first and second portions sense the same value of said control voltage, and additional means effective for at least temporarily preventing one of said first and second portions from sensing the changing value of said control voltage as the value of said speed is undergoing a change.

Claim 8

Circuit means according to claim 5, wherein said first means comprises a pulse generator continually driven in accordance with said speed.

Claim 9

Circuit means according to claim 5, wherein said first means comprises a magnetic type pulse generator driven in accordance with said speed, and transistor means triggered in accordance with the pulses created by said pulse generator to create amplified operating pulses.

Claim 10

Circuit means according to claim 5, wherein said second means comprises a tachometer circuit including monostable multivibrator means.

Claim 11

Circuit means according to claim 5, wherein said first means comprises a magnetic type pulse generator driven in accordance with said speed, first transistor means triggered in accordance with the pulses created by said pulse generator to create amplified operating pulses, and wherein said second means comprises a tachometer circuit including monostable multivibrator means, said monostable multivibrator means being acted upon and responsive to said amplified operating pulses.

Claim 12

Circuit means according to claim 9 wherein said monostable multivibrator comprises second and third transistor means, wherein said second and third transistor means are effective for producing intermediate actuating voltage pulses related to said amplified operating pulses, and wherein said tachometer circuit further comprises fourth transistor means and resistance means electrically coupled thereto, the conductivity of said fourth transistor being controlled by said intermediate actuating voltage pulses so that as said conductivity increases said resitance means becomes effective for creating said control voltage of a correspondingly increased value.

Claim 13

Circuit means according to claim 5, wherein said third means comprises a differential amplifier.

Claim 14

Circuit means according to claim 5, wherein said third means comprises a differential amplifier, and wherein said additional means comprises an R-C circuit coupled to said one of said first and second portions.

Claim 15

Circuit means according to claim 5, wherein said output means comprises a transistor having a base terminal electrically connected to said third means.

Claim 16

Circuit means according to claim 5, wherein said first means comprises a magnetic type pulse generator driven in accordance with said speed, first transistor means triggered in accordance with the pulses created by said pulse generator to create amplified operating pulses, wherein said second means comprises a tachometer circuit including monostable multivibrator means, said monostable multivibrator means being acted upon and responsive to said amplified operating pulses, said monostable multivibrator means comprising second and third transistor means effective for producing intermediate actuating voltage pulses related to said amplified operating pulses, said tachometer circuit further comprising fourth transistor means and resistance means electrically coupled thereto, the conductivity of said fourth transistor being controlled by said intermediate actuating voltage pulses so that as said conductivity increases said resistance means becomes effective for creating said control voltage of a correspondingly increased value, therein said third means comprises a differential amplifier with fifth and sixth transistor means, wherein said additional means comprises R-C circuit means coupled to said fifth transistor means, and wherein said output means comprises seventh transistor meand electrically connected and responsive to said differential amplifier.

Claim 17

Circuit means according to claim 5, wherein said additional means is effective for at least temporarily preventing one of said first and second portions from sensing the changing value of said control voltage only when the value of said speed is increasing.

Claim 18

A circuit for determining and responding to a rate of change of speed, comprising a source of electrical potential, first conductor means electrically connected to one electrical side of said source, second conductor means electrically connected to another side of said source, a first transistor having first collector emitter and base terminals, a second transistor having second collector emitter and base terminals, a third transistor having third collector emitter and base terminals, a fourth transistor having fourth collector emitter and base terminals, a fifth transistor having fifth collector emitter and base terminals, a sixth transistor having sixth collector emitter and base terminals, a seventh transistor having seventh collector emitter and base terminals, an eighth transistor having eighth collector emitter and base terminals, a ninth transistor having ninth collector emitter and base terminals, a tenth transistor having 10th collector emitter and base terminals, an eleventh transistor having 11th collector emitter and base terminals, each of said collector terminals being electrically connected to said first conductor means, each of said emitter terminals being electrically connected to said second conductor means, first resistance means interposed between said fifth emitter terminal and said second conductor means, second resistance means interposed between said sixth collector terminal and said first conductor means, a pulse generator driven in accordance with said speed electrically coupled to said first base terminal, said second base terminal being electrically connected to said first collector terminal, a first pulse coupling network for electrically coupling said third base terminal to said second collector terMinal, a second pulse coupling network for electrically coupling said fourth base terminal to said third collector terminal, said fifth base terminal being electrically connected to said fourth collector terminal, said sixth base terminal being electrically connected to said fifth emitter terminal at a point generally electrically between said first resistance means and said fifth emitter terminal, said eighth base terminal being electrically connected to said seventh emitter terminal, said ninth base terminal being electrically connected to said 10th emitter terminal, first circuit means electrically interconnecting said seventh and tenth base terminals to each other and to said sixth collector terminal generally electrically between said second resistance means and said sixth collector terminal, said 11th base terminal being electrically connected to said eighth collector terminal, R-C circuit means electrically connected to said sixth base terminal and said second conductor means, and second circuit means electrically connected to said eleventh collector and leading to related signal receiving means for responding to said rate of change of speed as sensed by said pulse generator.

Claim 19

A circuit for determining and responding to a rate of change of speed, comprising a source of electrical potential, first conductor means electrically connected to one electrical side of said source, second conductor means electrically connected to another side of said source, a first transistor having first collector emitter and base terminals, a second transistor having second collector emitter and base terminals, a third transistor having third collector emitter and base terminals, a fourth transistor having fourth collector emitter and base terminals, a fifth transistor having fifth collector emitter and base terminals, a sixth transistor having sixth collector emitter and base terminals, a seventh transistor having seventh collector emitter and base terminals, an eighth transistor having eighth collector emitter and base terminals, a ninth transistor having ninth collector emitter and base terminals, a tenth transistor having 10th collector emitter and base terminals, an eleventh transistor having 11th collector emitter and base terminals, each of said collector terminals being electrically connected to said first conductor means, each of said emitter terminals being electrically connected to said second conductor means, first resistance means interposed between said fifth emitter terminal and said second conductor means, second resistance means interposed between said sixth collector terminal and said first conductor means, a pulse generator driven in accordance with said speed electrically coupled to said first base terminal, said second base terminal being electrically connected to said first collector terminal, a first pulse coupling network for electrically coupling said third base terminal to said second collector terMinal, a second pulse coupling network for electrically coupling said fourth base terminal to said third collector terminal, said fifth base terminal being electrically connected to said fourth collector terminal, said sixth base terminal being electrically connected to said fifth emitter terminal at a point generally electrically between said first resistance means and said fifth emitter terminal, said eighth base terminal being electrically connected to said seventh emitter terminal, said ninth base terminal being electrically connected to said 10th emitter terminal, first circuit means electrically interconnecting said seventh and tenth base terminals to each other and to said sixth collector terminal generally electrically between said second resistance means and said sixth collector terminal, said 11th base terminal being electrically connected to said eighth collector terminal, R-C circuit means electrically connected to said sixth base terminal and said second conductor means, and second circuit means electrically connected to said eleventh collector and leading to related signal receiving means for responding to said rate of change of speed as sensed by said pulse generator.

Claim 20

A circuit according to claim 16, and further comprising a 12th transistor having twelveth collector emitter and base terminals, a 13th transistor having thirteenth collector emitter and base terminals, a 14th transistor having 14th collector emitter and base terminals, a 15th transistor having fifteenth collector emitter and base terminals, a 16th transistor having sixteenth collector emitter and base terminals, said 12th, 13th, 14th, 15th and 16th collector terminals each being electrically connected to said first conductor means, said 12th, 13th, 14th, 15th and 16th emitter terminals each being electrically connected to said second conductor means, said 13th base terminal being electrically connected to said 12th emitter terminal, said 14th base terminal being electrically connected to said 15th emitter termina, third circuit means electrically interconnecting said 12th and 15th base terminals to each other and to said fifth emitter terminal, second R-C circuit means electrically connected to said 12th base terminal and said second conductor means, said 16th base terminal being electrically connected to said 13th collector terminal, and fourth circuit means electrically connected to said 16th collector and leading to said related signal receiving means.

Claim 21

A circuit according to claim 16, wherein said first coupling network comprises first capacitor means interposed between said third collector terminal and said fourth base terminal.

Claim 22

A circuit according to claim 16, and further comprising capacitor means having one electrical side thereof electrically connected to said first conductor means and a second electrical side of said capacitor means being electrically connected to said fifth base terminal.