Field effect transistor impedance coupling network whose output voltage equals the input voltage

Claim 1

In an impedance coupling network for eliminating the offset between input and output voltages, the network comprising: first and second junction field effect transistors, each having gate, source and drain electrodes and being subject to an offset voltage between gate and source electrodes; signal input means connected to the gate electrode of said first transistor; positive and negative power input terminals and a common terminal, said power input terminals adapted to be energized from an electrical source which is positive and negative with respect to said common terminal; a series circuit connected from one of said terminals to the other of said terminals comprising in series the drain to source of said first transistor, offset resistive means, the drain to source of said second transistor, and further resistive means, said offset resistive means having such a value as to develop a voltage thereacross to nullify the first transistor offset voltage; a signal output terminal conductively connected to said second transistor drain electrode; and conductive means connecting the gate of said second transistor to said negative power input terminal wherein said second transistor and further resistive means operates as a constant current source for said first transistor.