Modular synchronous buffer unit for a buffer having a capacity depending on the number of interconnected identical buffer units

Claim 1

A buffer unit module for a synchronous buffer assembly using a plurality of serially connected buffer units to convey information signals from an information source to an information receiver each operating at a slightly different frequency; comprising input terminal means for receiving information signals having a given frequency; first clock pulse terminal means for receiving information clock pulses at the frequency of the information signals; second clock pulse terminal means for receiving local clock pulses at n times the frequency of the information signals, where n is an interger greater than 1; third clock pulse terminal means for receiving clock pulses at the frequency of the information receiver; information signal output terminal means; a shift register comprising n serially connected clocked bistable multivibrators, each of the multivibrators having an information input, a clock input and an information output, each multivibrator providing an output signal on the information output thereof Corresponding to the signal on the information input thereof in response to a pulse on the clock input thereof; means connecting the information input of the first multivibrator of the series to the input terminal means of the buffer unit; means connecting the information output of the last multivibrator of the series to the information output terminal means of the module; a bookkeeping register comprising n serially connected J-K flipflops, each J-K flipflop having a J input, a K input, a clock pulse input, a Q output and a Q output, the serial connection between flipflops of the bookkeeping register comprising means for connecting the Q output of each but the last J-K flipflop in the series to the J input of the next succeeding J-K flipflop in the series and means connecting the Q output of each but the first J-K flipflop in the series to the K input of the preceeding J-K flipflop in the series; means connecting the Q output of each J-K flipflop in the bookkeeping register to the clock input of the corresponding bistable multivibrator in the shift register; first clock pulse selection means connected to the first and second clock pulse terminals of the unit for providing a single output pulse having a pulse width equal to 1 period of the local clock pulses in response to a pulse of the information clock pulses; means connecting the output pulse of the first pulse selection means to the J input of the first J-K flipflop in the bookkeeping register; a second clock pulse selection means connected to the second and third clock pulse terminals of the unit for providing a single output pulse having a pulse width equal to 1 period of the local clock pulses in response to a pulse from the receiver clock pulses; an interunit bookkeeping input terminal; a first OR-gate having an output connected to the J input of the first J-K flipflop in the bookkeeping register; means connecting the output pulse of the first clock pulse selection means and the intermediate bookkeeping input terminal to the inputs of the first OR-gate, whereby the bookkeeping register receives input signals from the information clock pulse terminal through the first clock pulse selection means if the buffer unit is the first unit in the buffer assembly, and whereby the bookkeeping register receives input signals from the interunit bookkeeping input terminal if the buffer unit is connected to the information source through other buffer units; an interunit feedback output terminal connected to the Q output of the first J-K flipflop in the bookkeeping register; an interunit feedback input terminal; a second OR-gate having an output connected to the K input of the last J-K flipflop in the bookkeeping register; means connecting the output pulse of the second clock pulse selection means and the interunit feedback input terminal to inputs of the second ORgate, whereby the last stage of the bookkeeping register receives an input from the clock pulses of the information receiver through the second clock pulse selection means if the buffer unit in the buffer assembly is directly connected to the information receiver and whereby the last stage of the bookkeeping register receives an input from the interunit feedback input terminal if the buffer unit is connected to the information receiver through another buffer unit; and an interunit bookkeeping output terminal connected to the Q output of the last stage of the bookkeeping register.