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US3745372A Expired / Lapsed US ⏱️ 0.0 years remaining

Asynchronous adding-subtracting device

Assignee: US Philips Corp
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Filing: 1971-12-13
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Granted: 1973-07-10
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Expires: 1991-12-13
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Abstract

Abstract As asynchronous adding-subtracting device comprising a cascadeconnection of N sections, each of which comprises a coupling circuit and a counting flipflop. Each counting flipflop comprises a counting input and two signal outputs supplying inverted output signals. Each coupling circuit comprises two input terminals which are connected to the signal outputs of a counting flipflop of a preceding section, one output terminal which is connected to the counting input of the counting flipflop of the same section, and two control terminals. Each of the input terminals is connected, via the conducting path of an electronic switch, to the input of a differentiator, the output of which is connected to the output terminal of the coupling circuit. The control inputs of the electronic switches are connected to the control terminals and are connected to condition inputs via pulse-slope reducers. The pulses to be counted are applied to the counting input of the first counting flipflop. The condition signals determining the direction of counting are applied to the condition inputs. When the signals applied to the conditions inputs are exchanged, the voltage variation occurring on these terminals is applied to the control terminal by the pulse-slope reducers at a very small steepness, so that the electronic switches are gradually switched on and any voltage peaks produced by the differentiators cannot change the state of the counting flipflops.

Inventors

  • 👤 J Koster

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 09:33
CPC Classifications
H; H03; H03K; H03K23/00; H03K23/58

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 264 words
An asynchronous adding-subtracting device comprising a counting pulse input terminal for receiving counting pulses, two condition inputs for receiving two condition signals determining the counting direction, and a cascade connection of a number of sections, the first section of which comprises a counting flipflop, the remaining number of sections each comprising a coupling circuit and a counting flipflop, in which the counting flipflops are provided with a counting input and two signal outputs supplying inverted output signals, the counting input of the first counting flipflop being connected to the counting pulse input terminal, each coupling circuit comprising a differentiator provided with a signal input and a signal output terminal, two input terminals which are connected to the signal outputs of the counting flipflops of the preceding section, one output terminal which is connected to the counting input of the counting flipflop of the same section, and two control terminals which are coupled to the condition inputs, each coupling circuit comprises two electronic switches, each of which is provided with a control input and a conducting path, the control inputs forming the control terminals of the coupling circuit, the conducting paths of the switches being provided between the input terminals of the coupling circuit and the signal input terminal of the differentiator, the signal output terminal of the differentiator being connected to the output terminal of the coupling circuit, each condition input being connected to a control terminal of each coupling circuit via a pulse-slope reducer for gradually switching on the switch coupled to the control terminal after the condition signal has been switched on.
Claim 2
Dependent Claim 264 words
An asynchronous adding-subtracting device comprising a counting pulse input terminal for receiving counting pulses, two condition inputs for receiving two condition signals determining the counting direction, and a cascade connection of a number of sections, the first section of which comprises a counting flipflop, the remaining number of sections each comprising a coupling circuit and a counting flipflop, in which the counting flipflops are provided with a counting input and two signal outputs supplying inverted output signals, the counting input of the first counting flipflop being connected to the counting pulse input terminal, each coupling circuit comprising a differentiator provided with a signal input and a signal output terminal, two input terminals which are connected to the signal outputs of the counting flipflops of the preceding section, one output terminal which is connected to the counting input of the counting flipflop of the same section, and two control terminals which are coupled to the condition inputs, each coupling circuit comprises two electronic switches, each of which is provided with a control input and a conducting path, the control inputs forming the control terminals of the coupling circuit, the conducting paths of the switches being provided between the input terminals of the coupling circuit and the signal input terminal of the differentiator, the signal output terminal of the differentiator being connected to the output terminal of the coupling circuit, each condition input being connected to a control terminal of each coupling circuit via a pulse-slope reducer for gradually switching on the switch coupled to the control terminal after the condition signal has been switched on.
Claim 3
Dependent Claim 18 words
An asynchronous adding-subtracting device as claimed in claim 1, wherein the electronic switches are formed by field-effect transistors.
Claim 4
Dependent Claim 17 words
An asynchronous adding-subtracting device as claimed in claim 1, wherein the pulse-slope reducers are formed by integrators.
Claim 5
Dependent Claim 46 words
An asynchronous adding-subtracting device as claimed in claim 1, whereiN in each section the differentiator and the counting flipflop together are formed by one counting flip-flop of the type which changes its state when unipolar signal variations of sufficient steepness are applied to its counting input.

References Cited (Backward Citations)

No citation records indexed.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-07-09 1977-01-08 1977-07-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-07-09 1981-01-08 1981-07-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-07-09 1985-01-08 1985-07-10 $7700.00 Window Closed / Lapsed

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