US3744023A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Detection and correction of phase encoded data
Assignee: Storage Technology Corp
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Filing: 1971-05-17
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Granted: 1973-07-03
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Expires: 1991-05-17
Abstract
Abstract Phase encoded data on multi-track magnetic tape is decoded by integration detection. A first phase distortion check is made after the integration detection of the data on each track to detect a failure of the integration to reach a threshold level above or below the integrator squelch level. A second phase distortion check is made of the data on each track to determine if a data transition occurred within a certain portion of each bit cell. Each byte of data on the tape including one bit from each track is then stored in an error correction register. Simultaneously, a dead track register stores any phase check bit generated by the first and second phase distortion checks. If a parity check of the byte in the error correction register indicates a lack of parity, the byte is corrected in the bit position indicated by the phase check bit in the dead track register.
Inventors
- 👤 Anthony L Carpentier
- 👤 Juan A Rodriguez
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 09:52
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/08; G06F11/10; G11; G11B; G11B20/00; G11B20/10; G11B20/14; G11B20/1403; G11B20/1407; G11B20/1419; G11B20/18; G11B20/1806; G11B20/1813
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
148 words
In a multi-track computer tape drive, apparatus for indicating phase distortion during the reading of a phase encoded data input signal including a series of bit cells, said apparatus comprising: a variable frequency means for generating a clock signal having a frequency substantially equal to the nominal frequency of said input signal and having a change of state corresponding with the nominal data transition of said input signal; a decoding means for comparing the phase of said clock signal with said input signal and generating a phase comparison signal having a state representing relative phases of said clock signal and said input signal for each bit cell; and a means responsive to the phase relationship between said clock signal and said input signal for detecting a phase distortion in said input signal, said phase distortion detecting means generating a phase error signal indicating the presence of phase distortion.
Claim 2
Dependent Claim
148 words
In a multi-track computer tape drive, apparatus for indicating phase distortion during the reading of a phase encoded data input signal including a series of bit cells, said apparatus comprising: a variable frequency means for generating a clock signal having a frequency substantially equal to the nominal frequency of said input signal and having a change of state corresponding with the nominal data transition of said input signal; a decoding means for comparing the phase of said clock signal with said input signal and generating a phase comparison signal having a state representing relative phases of said clock signal and said input signal for each bit cell; and a means responsive to the phase relationship between said clock signal and said input signal for detecting a phase distortion in said input signal, said phase distortion detecting means generating a phase error signal indicating the presence of phase distortion.
Claim 3
Dependent Claim
29 words
The apparatus of claim 1 wherein said phase distortion detecting means detects noise on said input signal and generates a phase error signal indicating the presence of said noise.
Claim 4
Dependent Claim
30 words
The apparatus of claim 1 wherein said phase distortion detecting means detects a phase shift in the form of a data transition occurring outside a window in the bit cell.
Claim 5
Dependent Claim
57 words
The apparatus of claim 1 wherein said phase distortion detecting means comprises a latch means having said input signal as an input, said latch means being triggered at the beginning and end of said window to generate a phase error bit in said phase error signal at the end of a bit cell wherein phase distortion occurs.
Claim 6
Dependent Claim
48 words
The apparatus of claim 1 further comprising: an integrating means for integrating said phase comparison signal during each bit cell, said phase distortion detecting means including means for detecting the failure of the integrated output from said integrating means to exceed a threshold level thereby indicating phase distortion.
Claim 7
Dependent Claim
55 words
The apparatus of claim 5 wherein said means for detecting the failure of said integrated output to reach a predetermined level comprises a latch means triggered at the end of a bit cell to produce phase error bit in said phase error signal only when said integrated output has failed to reach said threshold level.
Claim 8
Dependent Claim
140 words
A multi-track computer tape drive system for correcting errors resulting from phase distortion of bit cells of phase encoded data on a multi-track magnetic tape during reading, each byte of data on the tape having bits represented by a flux change in a bit cell on each track of the tape, said apparatus comprising: a decoding means for detecting each bit in each byte of data; a detecting means for determining phase distortion in a bit cell for each byte of data and generating a phase error check bit for said bit cell; a means for performing a parity check on each byte of data; and a means for correcting an erroneous bit in a byte of data in response to the phase distortion detected in the corresponding bit cell when said error detecting means indicates a lack of parity.
Claim 9
Dependent Claim
140 words
A multi-track computer tape drive system for correcting errors resulting from phase distortion of bit cells of phase encoded data on a multi-track magnetic tape during reading, each byte of data on the tape having bits represented by a flux change in a bit cell on each track of the tape, said apparatus comprising: a decoding means for detecting each bit in each byte of data; a detecting means for determining phase distortion in a bit cell for each byte of data and generating a phase error check bit for said bit cell; a means for performing a parity check on each byte of data; and a means for correcting an erroneous bit in a byte of data in response to the phase distortion detected in the corresponding bit cell when said error detecting means indicates a lack of parity.
Claim 10
Dependent Claim
80 words
The apparatus of claim 7 further comprising: a skew buffer connected to said decoding means for accumulating decoded bytes of data; an error correction register connected to the output of said skew buffer for receiving bytes of data from said skew buffer; a phase check buffer means for accumulating phase error check bits for a plurality of bytes; and a dead track register for receiving said phase error check bit for each byte of data from said phase check buffer.
Claim 11
Dependent Claim
32 words
The apparatus of claim 8 wherein said detecting means detects the absence of a data transition in a window of the bit cell and generates a first phase error check bit therefore.
Claim 12
Dependent Claim
52 words
The apparatus of claim 9 wherein said decoding means includes an integration means and said detecting means comprises means for detecting the failure of the output from said integration Means to reach a predetermined signal level by the end of a bit cell and generates a second phase error check bit therefore.
Claim 13
Dependent Claim
39 words
The apparatus of claim 10 wherein said phase buffer means comprises a first buffer accumulating said first phase error check bit for each byte and a second buffer for accumulating said second phase error check bit for each byte.
References Cited (Backward Citations)
US3262097A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-07-02 | 1977-01-01 | 1977-07-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-07-02 | 1981-01-01 | 1981-07-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-07-02 | 1985-01-01 | 1985-07-03 | $7700.00 | Window Closed / Lapsed |