Radiation hardening read preamplifier

Claim 1

A radiation hardened read pre-amplifier circuit comprising in combination: a differential amplifier circuit having a first and second transistor, the emitters of said first and second transistors being connected by emitter resistors, a first and second input transistor to receive input signals respectively, said input signals being applied to the bases of said first and second transistors, the emitters of said first and second transistors being directly connected to the respective bases of said first and second transistors of said differential amplifier, a current source transistor having its collector connected between said emitter resistors of said first and second transistors of said differential amplifier, said current source transistor provide a constant current to said differential amplifier, a first and second output transistor connected to said differential amplifier, said first output transistor having its base connected to the collector of said first differential amplifier transistor, said second output transistor having its base connected to the collector of said second differential amplifier transistor, the emitters of said first and second output transistors being respectively connected to ground by emitter resistors, said first and second output transistors having output terminals connected to the emitters thereof, a negative supply voltage terminal to provide a negative bias voltage, the emitters of said first and second input transistors and said current source transistor being connected to said negative supply voltage terminal, a positive supply voltage terminal to provide a positive bias voltage, said positive supply voltage terminal being connected through a bias control transistor to the collectors of said first and second input transistors, said first and second differential amplifier transistors, said current source transistor, and said first and second output transistors, said bias control transistor having a photocurrent insensitive unit connected between its base and ground, and a plurality of photocurrent compensation devices to provide self compensation to said read pre-amplifier, said photocurrent compensation device comprising a transistor having a collector and base, said first and second input transistor having a compensation device connected in series between its base and said negative supply terminal respectively, said first and second differential amplifier transistor having a compensation device connected between said bases of said first and second differential amplifier transistors and said negative supply terminal respectively, said current source transistor having a compensation device connected in series between its collector and said positive supply voltage terminal, said current source transistor having its base connected to a voltage divider, said voltage divider comprising a first, second and third resistor, said base of said current source transistor being connected to the junction of said second and third resistor, the other end of said third resistor being connected to said negative supply voltage terminal, said first resistor being connected to the other end of said second resistor and ground, a compensation device connected between the junction of said first and second resistor and said negative supply voltage terminal.