Phototransistor automatic gain control

Claim 2

An automatic gain control circuit for adjusting the gain of a phototransistor circuit for producing a digital output signal indicative of an illuminated or unilluminated condition, comprising: a phototransistor having a first terminal and a second terminal; means for biasing said phototransistor in the knee region of the characteristic curve of said phototransistor; means for detecting a change in current through said phototransistor; amplifier means having an output, said amplifier means amplifying a change in current through said phototransistor detected by said detecting means; a capacitance connected in series with said first and second terminals between two predetermined potentials; means connected between said capacitance and said output of said amplifier means, said means being poled operative to allow charging of said capacitance when an increase in current flow through said phototransistor occurs, thereby decreasing the potential across said first and second terminals of said phototransistor.

Claim 3

An automatic gain control circuit for adjusting the gain of a phototransistor as recited in claim 1 wherein said amplifier means is provided with a negative feedback path.

Claim 4

An automatic gain control circuit for adjusting the gain of a phototransistor as recited in claim 1 wherein said output of said amplifier means is applied to a trigger circuit means.

Claim 5

An automatic gain control circuit for adjusting the gain of a phototransistor as recited in claim 3 wherein said trigger circuit means is provided with an adjustable poTential for varying the level of output signal of said amplifier means at which said trigger circuit means produces an output pulse.

Claim 6

An automatic gain control circuit for adjusting the gain of a phototransistor as recited in claim 4 wherein said capacitance is provided with a high impedance discharge path and a low impedance discharge path, said low impedance discharge path being provided with a diode connected in series with said low impedance discharge path and poled so as to allow discharge of said capacitance when forward biased, one end of said diode being connected to said trigger circuit means to reverse bias said diode and prevent rapid discharge of said capacitance when said trigger circuit means is triggered.

Claim 7

An automatic gain control circuit for adjusting the gain of a phototransistor circuit for producing a digital output signal indicative of an illuminated or unilluminated condition, comprising: a phototransistor having an emitter and a collector, said collector being connected through a resistance to a first predetermined potential, said phototransistor being biased in the knee region of the characteristic curve of said phototransistor, said phototransistor being responsive to radiation impinging thereon; amplifier means having a first input, a second input and an output, said collector of said phototransistor being connected to said first input of said amplifier means, said second input of said amplifier means being connected to a second predetermined potential; a capacitance connected between said emitter of said phototransistor and a third predetermined potential; means connected between said output of said amplifier means and said emitter of said phototransistor, said means being operative to allow charging of said capacitor in a polarity to decrease the potential across said phototransistor upon an increase in intensity of radiation impinging upon said phototransistor.

Claim 8

An automatic gain control circuit for adjusting the gain of a phototransistor circuit for producing a digital output signal indicative of an illuminated or unilluminated condition, comprising: a phototransistor having an emitter and a collector, said collector being connected through a resistance to a first predetermined potential, said phototransistor being biased in the knee region of the characteristic curve of said phototransistor, said phototransistor being responsive to radiation impinging thereon; amplifier means having a first input, a second input and an output, said collector of said phototransistor being connected to said first input of said amplifier means, said second input of said amplifier means being connected to a second predetermined potential; a capacitance connected between said emitter of said phototransistor and a third predetermined potential; means connected between said output of said amplifier means and said emitter of said phototransistor, said means being operative to allow charging of said capacitor in a polarity to decrease the potential across said phototransistor upon an increase in intensity of radiation impinging upon said phototransistor.

Claim 9

An automatic gain control circuit for adjusting the gain of a phototransistor as recited in claim 6 wherein said amplifier means is provided with a feedback circuit connected between said first input and said second input thereby causing said first input to tend toward said second predetermined potential on said second input of said amplifier means.

Claim 10

An automatic gain control circuit for adjusting the gain of a phototransistor as recited in claim 6 wherein said second predetermined potential equals said third predetermined potential.

Claim 11

An automatic gain control circuit for adjusting the gain of a phototransistor as recited in claim 6 wherein said output of said amplifier means provides an output signal to an input of a trigger circuit means, said input of said trigger circuit means being provided with an adjustable potential for varying the level of output signal of said amplifier means at which said trigger circuit means produces an output pulse.

Claim 12

An automatic gain control circuit for adjusting the gain of a phototransistor as recited in claim 6 wherein said amplifier means comprises an operational amplifier and wherein said first input is an inverting input of said operational amplifier.

Claim 13

An automatic gain control circuit for adjusting the gain of a phototransistor as recited in claim 9 including a high impedance discharge path and a low impedance discharge path for said capacitance, said low impedance discharge path being provided with a diode connected in series with said low impedance discharge path and poled so as to allow discharge of said capacitance when forward biased, one end of said diode being connected to said trigger circuit means to reverse bias said diode and to prevent rapid discharge to said capacitance when said trigger circuit means is triggered.