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US3743420A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and apparatus for measuring the period of electrical signals

Assignee: BBC Brown Boveri AG Switzerland
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Filing: 1971-09-23
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Granted: 1973-07-03
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Expires: 1991-09-23
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Abstract

Abstract The present method and apparatus measures the cycle duration of electrical signals by deriving through logic circuit means a time marker signal and a control signal from said electrical signals. The time marker signal is produced when the electrical signal passes through zero and if the electrical signal amplitude has exceeded a predetermined level during the half period just prior to said zero passage. The time marker signal indicates the number of cycles which have exceeded that level. The control signal indicates the total duration of said signals which have exceeded said level. The cycle duration of the time marker signal may then, for example, be determined in a counter which is switched on and set back to zero by the control signal. Alternatively, it is possible to determine the duration of a number of input signal periods from the control signal with the aid of the time marker signal. The present method and apparatus are especially useful for increasing the spacial resolution of Laser-Doppler flow probes.

Inventors

  • 👤 P Iten
  • 👤 J Mastner

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 14:07
CPC Classifications
G; G01; G01F; G01F1/00; G01F1/66; G01F1/661; G01S; G01S13/00; G01S13/02; G01S13/50; G01S13/58; G01S13/585

Claims Analysis

Total Claims: 21
Claim 1
Independent Claim 112 words
A method for measuring the period of an electrical signal having statistically fluctuating amplitudes which exceed a definite, adjustable level, comprising the steps of deriving a time marker signal from said input signal when the input signal passes through zero and in response to the fact that said input signal has exceeded said definite, adjustable level in the halfperiod preceeding said zero passage for indicating the number of periods which have exceeded said level, further deriving a control signal from said input signal for indicating the total duration of all periods which have exceeded said definite, adjustable level, and ascertaining the cycle duration of said input signal by combining said derived signals.
Claim 2
Independent Claim 112 words
A method for measuring the period of an electrical signal having statistically fluctuating amplitudes which exceed a definite, adjustable level, comprising the steps of deriving a time marker signal from said input signal when the input signal passes through zero and in response to the fact that said input signal has exceeded said definite, adjustable level in the halfperiod preceeding said zero passage for indicating the number of periods which have exceeded said level, further deriving a control signal from said input signal for indicating the total duration of all periods which have exceeded said definite, adjustable level, and ascertaining the cycle duration of said input signal by combining said derived signals.
Claim 3
Dependent Claim 52 words
The method according to claim 1, wherein for said ascertaining, the time marker signal is fed to period measuring means and wherein said control signal is supplied to a control input of said measuring means for starting a count and for resetting a counter to zero in response to its logic level.
Claim 4
Dependent Claim 60 words
The method according to claim 1, further comprising adjusting a presettable counter to a predetermined count of input signal periods, which have exceeded said definite, adjustable level, and ascertaining from said control signal with the aid of said time marker signal the mean cycle duration of said preset number of input signal periods, which have exceeded said definite, adjustable level.
Claim 5
Dependent Claim 41 words
The method according to claim 1, further comprising evaluating, as said input signal, the Doppler signal of a Laser-Doppler flow probe and ascertaining with said evaluating the cycle duration of those signals the amplitudes of which exceed said determined adjustable level.
Claim 6
Dependent Claim 53 words
The method according to claim 1, wherein said derived signals are produced as digital signals, said method further comprising summing said digital control signals for producing the total duration of said control signals, counting the digital time marker signals and dividing said total duration by the number of said digital time marker signals.
Claim 7
Dependent Claim 42 words
The method according to claim 1, wherein said derived signals are produced as analog signals, said method further comprising integrating said analog control signals, counting said time marker signals, and dividing the integration result by the number of said time marker signals.
Claim 8
Independent Claim 143 words
An apparatus for measuring the cycle duration of an electrical input signal having statistically fluctuaTing amplitudes which exceed a definite, adjustable level, comprising first circuit means responsive to said input signal for deriving a time marker signal from said input signal when the latter passes through zero and if said input signal has exceeded said definite, adjustable level during a half cycle preceeding said passage through zero, and second circuit means also responsive to said input signal for deriving a control signal from said input signal, whereby said time marker signal indicates the number of periods during which the input signal has exceeded said level while the control signal indicates the total duration of said number of periods, and measuring means connected to said first and second circuit means for ascertaining said cycle duration from said time marker signal to said control signal.
Claim 9
Independent Claim 143 words
An apparatus for measuring the cycle duration of an electrical input signal having statistically fluctuaTing amplitudes which exceed a definite, adjustable level, comprising first circuit means responsive to said input signal for deriving a time marker signal from said input signal when the latter passes through zero and if said input signal has exceeded said definite, adjustable level during a half cycle preceeding said passage through zero, and second circuit means also responsive to said input signal for deriving a control signal from said input signal, whereby said time marker signal indicates the number of periods during which the input signal has exceeded said level while the control signal indicates the total duration of said number of periods, and measuring means connected to said first and second circuit means for ascertaining said cycle duration from said time marker signal to said control signal.
Claim 10
Dependent Claim 52 words
The apparatus according to claim 7, wherein said cycle duration measuring means include a counter having a control input and means for supplying said control signal to said counter control input for starting the counter and resetting the counter to zero in response to the respective logical level of said control signals.
Claim 11
Dependent Claim 37 words
The apparatus according to claim 7, further comprising a presettable counter and logic circuit means for interconnecting said counter with said measuring means for ascertaining the mean cycle duration of said preset count of input cycle periods.
Claim 12
Dependent Claim 317 words
The apparatus according to claim 7, wherein said first circuit means comprise a first comparator means having an output, an input connected to receive said electrical input signal and a comparing input connected to ground, a first Schmitt-trigger connected to said first comparator output and having first and second outputs, first and second mono-stable multivibrator means connected respectively to said first and second outputs of the first Schmitt-trigger, a first set-reset flip-flop connected with its reset input to an output of said first mono-stable multivibrator, a first AND-gate having one input connected to a first output of said first set-reset flip-flop, a second AND-gate having one input connected to a second output of said first flip-flop, means for connecting second inputs of said first and second AND-gates in parallel to each other and to an output of said second mono-stable multivibrator, a second set-reset flip-flop having its set input connected to an output of said first AND-gate and its reset input connected to an output of the second AND gate; and wherein said second circuit means comprise second comparator means, an adjustable voltage source connected to a comparing input of said second comparator means, means for connecting another input of said second comparator means to receive said electrical input signal, a third mono-stable multivibrator, a second Schmitt trigger interconnected between an output of said second comparator and an input of said third monostable multivibrator, a third AND-gate, means for connecting a first input of said third AND-gate to an output of the third mono-stable multivibrator, a further voltage source, means for connecting two other inputs of the third AND-gate in parallel to said further voltage source, and means for connecting an output of the third AND-gate to a set-input of the first set-reset flip-flop, and circuit means for connecting the output of said first AND-gate and an output of said second set-reset flip-flop to said measuring means.
Claim 13
Dependent Claim 25 words
The apparatus according to claim 10, further comprising starter switching means for connecting said further voltage source to a second input of said third AND-gate.
Claim 14
Dependent Claim 63 words
The apparatus according to claim 11, further comprising a presettable counter, means for connecting an input of said presettable counter to the output of said first AND-gate, further switching means for connecting an output of said presettable counter to a third input of said third AND gate and simultaneously disconnecting said third input of the third AND gate from said further voltage source.
Claim 15
Dependent Claim 53 words
The apparatus according to claim 7, wherein said measuring means comprise a binary counter connected to outputs of said first and second circuit means, an integrating circuit, and a sample-and-hold circuit, and logic circuit means for interconnecting said counter, the integrating circuit, and the sample-and-hold circuit for producing a cycle duration proportional signal.
Claim 16
Dependent Claim 40 words
The apparatus according to claim 13, for producing a frequency proportional signal, further comprising a computing circuit connected to the output of the sample and hold circuit for producing at the output of the computing circuit a frequency proportional signal.
Claim 17
Dependent Claim 184 words
The apparatus according to claim 13, wherein said binary counter comprises a first flip-flop stage having a counting input connected to an output of said first circuit means, a second flip-flop stage connected in series with the first stage, each stage having a control input connected in parallel to an output of said second circuit means, each stage further having first and second outputs; a first AND-gate connected with its inputs to the first outputs of both stages, a second AND-gate connected with one input to the second output of the first stage, and with another input to the first output of the second stage, a third AND-gate connected with its inputs to the second outputs of both stages, a constant current source, first switching means for connecting said constant current source to said integrating circuit in response to an output from the first AND-gate, second switching means for connecting said integrating circuit to said sample-and-hold circuit in response to an output from said second AND-gate, and third switching means for controlling said integrating circuit in response to an output from said third AND-gate.
Claim 18
Dependent Claim 48 words
The apparatus according to claim 15, wherein said integrating circuit comprises an operational amplifier, a capacitor connected to ground, to an input of said operational amplifier and through said first switching means to said constant current source, said capacitor being dischargeable to ground through said third switching means.
Claim 19
Dependent Claim 31 words
The apparatus according to claim 15, wherein said sample and hold circuit comprises an operational amplifier and a capacitor connected to one of its inputs and to said second switching means.
Claim 20
Dependent Claim 23 words
The apparatus according to claim 15, wherein said control input is a stop counting input for stopping the counting of both stages simultaneously.
Claim 21
Dependent Claim 91 words
The apparatus according to claim 7, further comprising means for producing said electrical input signal, said input signal producing means comprising a Doppler flow probe, means for producing a laser beam, means for directing said laser beam through said flow probe, photo detecting means, means for directing a partial beam passing directly through said flow probe as well as a deflected beam from said flow probe to said photo detecting means, and means for connecting an output of said photo detecting means to inputs of said first and second circuit means.

References Cited (Backward Citations)

US3518531A Cited
US3555434A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-07-02 1977-01-01 1977-07-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-07-02 1981-01-01 1981-07-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-07-02 1985-01-01 1985-07-03 $7700.00 Window Closed / Lapsed

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