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US3742456A Expired / Lapsed US ⏱️ 0.0 years remaining

Apparatus for selectively formatting serial data bits into separate data characters

Assignee: Pitney Bowes Inc
•
Filing: 1972-04-05
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Granted: 1973-06-26
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Expires: 1992-04-05
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Abstract

Abstract Interface apparatus which formats bits of data serially received from, for example, a data casette into preassigned groups of bits, such as, for example, alphanumerics which are transmitted in parallel to a data utilization device, such as, for example, a digital computer. The interface apparatus includes at least one shift register which is preshifted a number of positions before accepting data bits and then serially receives the data bits which are also shifted in the register. When a given total number of shifts has occurred, the contents of the shift register are transferred bits in parallel to the data utilization device.

Inventors

  • 👤 Figgans R Mc
  • 👤 H Jones

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 12:38
CPC Classifications
H; H03; H03M; H03M9/00; G; G11; G11C; G11C19/00

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 179 words
Apparatus for formatting serially received data bits into separate data characters for parallel data bit, serial data character transmission to a data utilization device, said apparatus comprising: A. at least one shift register having a given number of stages, B. initializing means for entering an indicator bit of one bit value into an input stage of said one shift register and clearing the remaining stages thereof to a bit value opposite said one bit value, C. means for shifting said one shift register one position with the receipt of each data bit at said input stage, D. format positioning means for shifting said one shift register in the absence of incoming data bits a given number of positions equal to one less than the number of stages minus the number of data bits in each character, and E. means for sensing when said indicator bit is shifted into a last stage of said one shift register to initiate acceptance by the utilization device of a data character transmission from said one shift register and for actuating said initializing means.
Claim 2
Dependent Claim 179 words
Apparatus for formatting serially received data bits into separate data characters for parallel data bit, serial data character transmission to a data utilization device, said apparatus comprising: A. at least one shift register having a given number of stages, B. initializing means for entering an indicator bit of one bit value into an input stage of said one shift register and clearing the remaining stages thereof to a bit value opposite said one bit value, C. means for shifting said one shift register one position with the receipt of each data bit at said input stage, D. format positioning means for shifting said one shift register in the absence of incoming data bits a given number of positions equal to one less than the number of stages minus the number of data bits in each character, and E. means for sensing when said indicator bit is shifted into a last stage of said one shift register to initiate acceptance by the utilization device of a data character transmission from said one shift register and for actuating said initializing means.
Claim 3
Dependent Claim 32 words
The apparatus of claim 1, wherein said format positioning means operates subsequent to said initializing means and prior to the receipt of data bits of a data character at said input stage.
Claim 4
Dependent Claim 182 words
The apparatus of claim 1, further comprising: A. another shift register corresponding to said one shift register, B. other initializing means for entering an indicator bit of said one bit value in an input stage of said other shift register and clearing the remaining stages thereof to said opposite bit value, C. other means for shifting said other shift register one position with the receipt of each data bit at said input stage thereof, D. other format positioning means for shifting said other shift register in the absence of incoming data bits a given number of positions equal to one less than the number of stages thereof minus the number of data bits in each data character, E. other means for sensing when said indicator bit is shifted into a last stage of said other shift register to initiate acceptance by the utilization device of a data character transmission from said other shift register and for actuating said other initializing means, and F. control means for routing data characters alternately to said shift registers under the control of both said sensing means.
Claim 5
Dependent Claim 38 words
The apparatus defined in claim 3, wherein said format positioning means are operative subsequent to their respectively associated initializing means and prior to the receipt of data characters at the input stages of their respectively associated shift registers.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-06-25 1976-12-25 1977-06-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-06-25 1980-12-25 1981-06-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-06-25 1984-12-25 1985-06-26 $7700.00 Window Closed / Lapsed

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