Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
231 words
A time division communication system wherein a plurality of timt slots occurs in repetitive cycles and each time slot includes at least first and second time intervals comprising a plurality of lines, first and second common buses, and a signal transfer circuit connected to said first and second common buses, each line having an associated circuit comprising signal storing means, means for coupling said stored signal to said associated line, and means for selectively connecting said associated line to said second common bus, said signal transfer circuit comprising means operative in the first time interval of a distinct time slot including means for receiving a signal from a first line circuit storing means via said first common bus, means for receiving the coupled stored signal and a signal outgoing from said first line via said second common bus, and means responsive to said signal from said first common bus and the signal from said second common bus for subtracting the signal applied via said first common bus from twice the signal applied via said second common bus, means for storing the resulting difference, and means operative in said second time interval of the distinct time slot including means for applying the resulting difference signal corresponding to the first line outgoing signal to said first common bus and means for connecting said first common bus to said second line circuit storing means.
Claim 2
Dependent Claim
231 words
A time division communication system wherein a plurality of timt slots occurs in repetitive cycles and each time slot includes at least first and second time intervals comprising a plurality of lines, first and second common buses, and a signal transfer circuit connected to said first and second common buses, each line having an associated circuit comprising signal storing means, means for coupling said stored signal to said associated line, and means for selectively connecting said associated line to said second common bus, said signal transfer circuit comprising means operative in the first time interval of a distinct time slot including means for receiving a signal from a first line circuit storing means via said first common bus, means for receiving the coupled stored signal and a signal outgoing from said first line via said second common bus, and means responsive to said signal from said first common bus and the signal from said second common bus for subtracting the signal applied via said first common bus from twice the signal applied via said second common bus, means for storing the resulting difference, and means operative in said second time interval of the distinct time slot including means for applying the resulting difference signal corresponding to the first line outgoing signal to said first common bus and means for connecting said first common bus to said second line circuit storing means.
Claim 3
Dependent Claim
225 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes at least first and second time intervals comprising a plurality of lines, first and second common buses, and a signal transfer circuit connected to said first and second common buses, each line having an associated circuit comprising signal storing means, means for coupling said stored signal to said associated line, and means for selectively connecting said associated line to said second common bus, said signal transfer circuit comprising means operative in the first time interval of a distinct time slot including means for receiving a signal from a first line circuit storing means via said first common bus, means for receiving the coupled stored signal and a signal outgoing from said first line via said second common bus, first means for storing the signal received from said first common bus and second means for storing twice the signal received from said second common bus, and means operative in the second time interval of the distinct time slot including means for subtracting the first storing means signal from the second storing means signal and for applying the resulting difference corresponding to the first station outgoing signal to said first common bus, and means for connecting said first common bus to said second line circuit storing means.
Claim 4
Dependent Claim
225 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes at least first and second time intervals comprising a plurality of lines, first and second common buses, and a signal transfer circuit connected to said first and second common buses, each line having an associated circuit comprising signal storing means, means for coupling said stored signal to said associated line, and means for selectively connecting said associated line to said second common bus, said signal transfer circuit comprising means operative in the first time interval of a distinct time slot including means for receiving a signal from a first line circuit storing means via said first common bus, means for receiving the coupled stored signal and a signal outgoing from said first line via said second common bus, first means for storing the signal received from said first common bus and second means for storing twice the signal received from said second common bus, and means operative in the second time interval of the distinct time slot including means for subtracting the first storing means signal from the second storing means signal and for applying the resulting difference corresponding to the first station outgoing signal to said first common bus, and means for connecting said first common bus to said second line circuit storing means.
Claim 5
Dependent Claim
346 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first, second, third and fourth time intervals comprising a plurality of lines, first and second common buses, and a signal transfer circuit connected to said first and second common buses, each line having an associated circuit comprising signal storing means, means for coupling said stored signal to said associated line, and means for selectively connecting said associated line to said second common bus, said signal transfer circuit comprising means operative in the first time interval of a distinct time slot including means for receiving a signal from a first line circuit storing means via said first common bus, means for receiving the coupled stored signal and a signal outgoing from said first line via said second common bus, and means responsive to said signal from said first common bus and the signal from said second common bus for storing a first distinct signal, means operative in the second time interval of said distinct time slot including means responsive to said stored first distinct signal for applying a signal corresponding to the first line outgoing signal to said first common bus and means for connecting said first common bus to said second line circuit storing means, means operative in the third time interval of said distinct time slot including means for receiving a signal from the second line circuit storing means via said first common bus, means for receiving the second line circuit coupled stored signal and a signal outgoing from said second line via said second common bus, and means responsive to the signal from said first common bus and the signal from said second common bus for storing a second distinct signal, and means operative in the fourth time interval of the distinct time slot including means responsive to said stored second distinct signal for applying a signal corresponding to the second line outgoing signal to said first common bus, and means for connecting said first common bus to said first line circuit storing means.
Claim 6
Dependent Claim
346 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first, second, third and fourth time intervals comprising a plurality of lines, first and second common buses, and a signal transfer circuit connected to said first and second common buses, each line having an associated circuit comprising signal storing means, means for coupling said stored signal to said associated line, and means for selectively connecting said associated line to said second common bus, said signal transfer circuit comprising means operative in the first time interval of a distinct time slot including means for receiving a signal from a first line circuit storing means via said first common bus, means for receiving the coupled stored signal and a signal outgoing from said first line via said second common bus, and means responsive to said signal from said first common bus and the signal from said second common bus for storing a first distinct signal, means operative in the second time interval of said distinct time slot including means responsive to said stored first distinct signal for applying a signal corresponding to the first line outgoing signal to said first common bus and means for connecting said first common bus to said second line circuit storing means, means operative in the third time interval of said distinct time slot including means for receiving a signal from the second line circuit storing means via said first common bus, means for receiving the second line circuit coupled stored signal and a signal outgoing from said second line via said second common bus, and means responsive to the signal from said first common bus and the signal from said second common bus for storing a second distinct signal, and means operative in the fourth time interval of the distinct time slot including means responsive to said stored second distinct signal for applying a signal corresponding to the second line outgoing signal to said first common bus, and means for connecting said first common bus to said first line circuit storing means.
Claim 7
Dependent Claim
342 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first, second, third and fourth time intervals comprising a plurality of lines, first and second common buses, and a signal transfer circuit connected to said first and second common bus, each line having an associated circuit comprising signal storing means, means for coupling said stored signal to the associated line, and means for selectively connecting said associated line to the second common bus, said signal transfer circuit comprising means operative in the first time interval of a distinct time slot comprising means for receiving a signal from a first line circuit storing means via said first common bus, means for receiving the coupled stored signal and the outgoing signal from said first line via said second common bus, and first means responsive to the signal from said first common bus and the signal from said common bus for storing a first signal corresponding to the first line outgoing signal, means operative in the second time interval of said distinct time slot comprising means for receiving a signal from a second line circuit storing means via said first common bus, means for receiving the coupled stored signal and the outgoing signal from said second line via said second common bus, and second means responsive to the signal from said first common bus and the signal from the second common bus for storing a second signal corresponding to the second line outgoing signal, means operative in the third time interval of said dstinct time slot comprising means for applying said first signal from said first signal storing means to said first common bus and means for connecting said first common bus to the second line circuit storing means, and means operative in the fourth time interval of said distinct time slot comprising means for applying the second signal from said second signal storing means to said first common bus and means for connecting said first common bus to said first line circuit storing means.
Claim 8
Dependent Claim
342 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first, second, third and fourth time intervals comprising a plurality of lines, first and second common buses, and a signal transfer circuit connected to said first and second common bus, each line having an associated circuit comprising signal storing means, means for coupling said stored signal to the associated line, and means for selectively connecting said associated line to the second common bus, said signal transfer circuit comprising means operative in the first time interval of a distinct time slot comprising means for receiving a signal from a first line circuit storing means via said first common bus, means for receiving the coupled stored signal and the outgoing signal from said first line via said second common bus, and first means responsive to the signal from said first common bus and the signal from said common bus for storing a first signal corresponding to the first line outgoing signal, means operative in the second time interval of said distinct time slot comprising means for receiving a signal from a second line circuit storing means via said first common bus, means for receiving the coupled stored signal and the outgoing signal from said second line via said second common bus, and second means responsive to the signal from said first common bus and the signal from the second common bus for storing a second signal corresponding to the second line outgoing signal, means operative in the third time interval of said dstinct time slot comprising means for applying said first signal from said first signal storing means to said first common bus and means for connecting said first common bus to the second line circuit storing means, and means operative in the fourth time interval of said distinct time slot comprising means for applying the second signal from said second signal storing means to said first common bus and means for connecting said first common bus to said first line circuit storing means.
Claim 9
Dependent Claim
85 words
A time division communication system according to claim 4 wherein said first signal storing means comprises means for subtracting the signal on said first common bus from twice the signal on said second common bus in said first time interval and means for storing the resultant difference, and said second signal storing means comprises means for subtracting the signal on said first common bus from twice the signal on said second common bus in said second time interval and means for storing the resulting difference.
Claim 10
Dependent Claim
151 words
A time division communication system according to claim 4, wherein said first signal storing means comprises third means for storing the signal from said first common bus and fourth means for storing twice the signal from said second common bus in said first time interval, said second sIgnal storing means comprises fifth means for storing the signal from said first common bus and sixth means for storing twice the signal from said common bus, said applying means operative in said third time interval further comprises means connected between said third and fourth storing means and said first common bus for subtracting the third storing means signal from the fourth storing means signal, and said applying means operative in said fourth time interval further comprises means connected between said fifth and sixth storing means and said first common bus for subtracting the fifth storing means signal from the sixth storing means signal.
Claim 11
Dependent Claim
376 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first and second time intervals comprising a plurality of stations, first and second common buses, a signal transfer circuit connected to said first and second common buses for transferring signals from a first station to a second station in a distinct time slot, control means for generating first, second and third control signals, each station having an associated circuit comprising a circuit storage capacitor, first switching means responsive to the first control signal being applied to said associated circuit for connecting said first common bus to said circuit storage capacitor, amplifying means having its input connected to said storage capacitor and its output connected to said associated station, second switching means responsive to said first control signal being applied to said associated circuit for connecting the output of said amplifying means to said second common bus, said signal transfer circuit comprising a transfer storage capacitor, subtracting means having first and second inputs and an output, said first input being connected to said first common bus, said second input being connected to said second common bus, said subtracting means being operative to subtract the signal appearing on said first input from twice the signal appearing on said second input, third switching means responsive to the second control signal being applied to said signal transfer circuit for connecting said subtracting means output to said transfer storage capacitor and means connected between said transfer storage capacitor and said first common bus comprising transfer circuit amplifying means having its input connected to said transfer storage capacitor, fourth switching means responsive to said third control signal being applied to said signal transfer circuit for connecting the output of said transfer circuit amplifying means to said first common bus, means operative in the first time interval of said distinct time slot for applying said first control signal to said first station associated circuit and for applying said second control signal to said signal transfer circuit, and means operative in the second time interval of said distinct time slot for applying said third control signal to said signal transfer circuit and for applying said first control signal to said second station associated circuit.
Claim 12
Dependent Claim
376 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first and second time intervals comprising a plurality of stations, first and second common buses, a signal transfer circuit connected to said first and second common buses for transferring signals from a first station to a second station in a distinct time slot, control means for generating first, second and third control signals, each station having an associated circuit comprising a circuit storage capacitor, first switching means responsive to the first control signal being applied to said associated circuit for connecting said first common bus to said circuit storage capacitor, amplifying means having its input connected to said storage capacitor and its output connected to said associated station, second switching means responsive to said first control signal being applied to said associated circuit for connecting the output of said amplifying means to said second common bus, said signal transfer circuit comprising a transfer storage capacitor, subtracting means having first and second inputs and an output, said first input being connected to said first common bus, said second input being connected to said second common bus, said subtracting means being operative to subtract the signal appearing on said first input from twice the signal appearing on said second input, third switching means responsive to the second control signal being applied to said signal transfer circuit for connecting said subtracting means output to said transfer storage capacitor and means connected between said transfer storage capacitor and said first common bus comprising transfer circuit amplifying means having its input connected to said transfer storage capacitor, fourth switching means responsive to said third control signal being applied to said signal transfer circuit for connecting the output of said transfer circuit amplifying means to said first common bus, means operative in the first time interval of said distinct time slot for applying said first control signal to said first station associated circuit and for applying said second control signal to said signal transfer circuit, and means operative in the second time interval of said distinct time slot for applying said third control signal to said signal transfer circuit and for applying said first control signal to said second station associated circuit.
Claim 13
Dependent Claim
227 words
A time division communication system according to claim 8 wherein each switching means comprises an insulated gate field effect transistor having a gate electrode, a source electrode and a drain electrode, the source electrode of said first switching means being connected to said first common bus, the drain electrode of said first switching means being connected to said circuit storage capacitor, and the gate electrode of said first switching means being connected to said first control signal applying means, the source electrode of said second switching means being connected to said second common bus, the drain electrode of said second switching means being connected to the output of said amplifying means, and the gate electrode of said second switching means being connected to the first control signal applying means, the source electrode of said third switching means being connected to the subtracting means Output, the drain electrode of said third switching means being connected to the transfer storage capacitor, and the gate electrode of said third switching means being connected to said second control signal applying means, the source electrode of said fourth switching means being connected to the transfer circuit amplifying means output, the drain electrode of said fourth switching means being connected to the first common bus, and the gate electrode of said fourth switching means being connected to said third control signal applying means.
Claim 14
Dependent Claim
335 words
A time division communication system wherin a plurality of time slots occurs in repetitive cycles and each time slot includes first and second time intervals comprising a plurality of stations, first and second common buses, a signal transfer circuit connected to said first and second common buses for transferring a signal from a first station to a second station in a distinct time slot, control means for generating first, second and third control signals, each station having an associated circuit comprising a circuit storage capacitor, first switching means responsive to the first control signal being applied to said associated circuit for connecting said first common bus to said circuit storage capacitor, amplifying means having an input connected to said storage capacitor and an output connected to said associated station, second switching means responsive to said first control signal being applied to said associated circuit for connecting the output of said amplifying means to said second common bus, said signal transfer circuit comprising first, second, and third storage capacitors, means responsive to said second control signal being applied to said signal transfer circuit for coupling said first common bus to said first storage capacitor and for coupling said second common bus to each of said second and third storage capacitors, and means responsive to a third control signal being applied to said signal transfer circuit for serially connecting said first, second and third capacitors to subtract the signal on said first capacitor from the sum of the signals on said second and third capacitors and for coupling the signal from said series connected first, second and third capacitors to said first common bus, means operative in said first time interval for applying said first control signal to said first station associated circuit and for applying said second control signal to said signal transfer circuit, and means operative in said second time interval for applying said third control signal to said signal transfer circuit and for applying said first control signal to said second station associated circuit.
Claim 15
Dependent Claim
335 words
A time division communication system wherin a plurality of time slots occurs in repetitive cycles and each time slot includes first and second time intervals comprising a plurality of stations, first and second common buses, a signal transfer circuit connected to said first and second common buses for transferring a signal from a first station to a second station in a distinct time slot, control means for generating first, second and third control signals, each station having an associated circuit comprising a circuit storage capacitor, first switching means responsive to the first control signal being applied to said associated circuit for connecting said first common bus to said circuit storage capacitor, amplifying means having an input connected to said storage capacitor and an output connected to said associated station, second switching means responsive to said first control signal being applied to said associated circuit for connecting the output of said amplifying means to said second common bus, said signal transfer circuit comprising first, second, and third storage capacitors, means responsive to said second control signal being applied to said signal transfer circuit for coupling said first common bus to said first storage capacitor and for coupling said second common bus to each of said second and third storage capacitors, and means responsive to a third control signal being applied to said signal transfer circuit for serially connecting said first, second and third capacitors to subtract the signal on said first capacitor from the sum of the signals on said second and third capacitors and for coupling the signal from said series connected first, second and third capacitors to said first common bus, means operative in said first time interval for applying said first control signal to said first station associated circuit and for applying said second control signal to said signal transfer circuit, and means operative in said second time interval for applying said third control signal to said signal transfer circuit and for applying said first control signal to said second station associated circuit.
Claim 16
Dependent Claim
374 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first, second, third and fourth time intervals comprising a plurality of stations, first and second common uses, a signal transfer circuit connected to said first and second common buses for exchanging signals between a first station and a second station in a distinct time slot, each station having a circuit comprising a circuit storage capacitor and amplifying means having an input connected to said circuit storage capacitor and an output connected to said associated station, means operative in said first time interval for connecting said first station circuit storage capacitor to said first common bus and for connecting said first station circuit amplifying means output to said second common bus, means operative in said second time interval for connecting said second station cicuit storage capacitor to said first common bus and for connecting said second station amplifying means output to said second common bus, means for connecting said first station storage capacitor to said first common bus in said third time interval, means for connecting said second circuit station storage capacitor to said first common bus in said fourth time interval, said signal transfer circuit comprising subtractinG means having an output, a first input connected to said first common bus and a second input connected to said second common bus for subtracting the signal on said first input from twice the signal on said second input and for applying the resultant difference signal to said output, a first transfer storage capacitor, means operative in said first time interval for applying the resultant difference signal corresponding to the outgoing signal from said first station to said first transfer storage capacitor, a second transfer storage capacitor, means operative in said second time interval for applying the resultant difference signal from said subtracting means output corresponding to the outgoing signal from said second station to said second transfer storage capacitor, means operative in said third time interval for applying the signal stored in said first transfer storage capacitor to said first common bus, and means operative in said fourth time interval for applying the signal stored in said second transfer storage capacitor to said first common bus.
Claim 17
Dependent Claim
374 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first, second, third and fourth time intervals comprising a plurality of stations, first and second common uses, a signal transfer circuit connected to said first and second common buses for exchanging signals between a first station and a second station in a distinct time slot, each station having a circuit comprising a circuit storage capacitor and amplifying means having an input connected to said circuit storage capacitor and an output connected to said associated station, means operative in said first time interval for connecting said first station circuit storage capacitor to said first common bus and for connecting said first station circuit amplifying means output to said second common bus, means operative in said second time interval for connecting said second station cicuit storage capacitor to said first common bus and for connecting said second station amplifying means output to said second common bus, means for connecting said first station storage capacitor to said first common bus in said third time interval, means for connecting said second circuit station storage capacitor to said first common bus in said fourth time interval, said signal transfer circuit comprising subtractinG means having an output, a first input connected to said first common bus and a second input connected to said second common bus for subtracting the signal on said first input from twice the signal on said second input and for applying the resultant difference signal to said output, a first transfer storage capacitor, means operative in said first time interval for applying the resultant difference signal corresponding to the outgoing signal from said first station to said first transfer storage capacitor, a second transfer storage capacitor, means operative in said second time interval for applying the resultant difference signal from said subtracting means output corresponding to the outgoing signal from said second station to said second transfer storage capacitor, means operative in said third time interval for applying the signal stored in said first transfer storage capacitor to said first common bus, and means operative in said fourth time interval for applying the signal stored in said second transfer storage capacitor to said first common bus.
Claim 18
Dependent Claim
485 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first, second, third and fourth time intervals comprising a plurality of stations, first and second common buses, a signal transfer circuit connected to said first and second commeon buses for exchanging signals between a first station and a second station in a distinct time slot, each station having a circuit comprisng a circuit storage capacitor and amplifying means having an input connected to said circuit storage capacitor and an output connected to said associated station, means operative in said first time interval for connecting said first station storage capacitor to said first common bus and for connecting said first station circuit amplifying means output to said second common bus, means operative in said second time interval for connecting said second station circuit storage capacitor to said first common bus and said second station amplifying means output to said second common bus, means for connecting said first station circuit storage capacitor to said first common bus in said third time interval, means for connecting said second station circuit storage capacitor to said first common bus in said fourth time interval, said signal transfer circuit comprising first signal transfer means for transferring a signal from said first station to said second station comprising means operative in said first time interval including first, second and third storage capacitors, means for applying the signal appearing on said first common bus in said first time interval to said first storage capacitor, means for applying the signal appearing on said second common bus in said first time interval to each of said second and third storage capacitors, and means operative in said third time interval comprising means for serially connecting said first, second and third storage capacitors to subtract the signal on said first storage capacitor from the sum of the signals on said second and third storage capacitors and means for applying the resultant difference signal from said serially connected capacitors to said first common bus, and second signal transfer means for transferring a signal from said second station to said first station comprising means operative in said second time interval including fourth, fifth and sixth storage capacitors, means for applying the signal appearing on said first common bus in said second time interval to said fourth storage capacitor and means for applying the signal appearing on said second common bus in said second time interval to each of said fifth and sixth storage capacitors, and means operative in said fourth time interval comprising means for serially connecting said fourth, fifth and sixth storage capcitators to subtract the signal on said fourth storage capacitor from the sum of the signals on said fifth and sixth storage capacitors, and means for applying the resultaNt difference signal from said serially connected fourth, fifth and sixth storage capacitors to said first common bus.
Claim 19
Dependent Claim
485 words
A time division communication system wherein a plurality of time slots occurs in repetitive cycles and each time slot includes first, second, third and fourth time intervals comprising a plurality of stations, first and second common buses, a signal transfer circuit connected to said first and second commeon buses for exchanging signals between a first station and a second station in a distinct time slot, each station having a circuit comprisng a circuit storage capacitor and amplifying means having an input connected to said circuit storage capacitor and an output connected to said associated station, means operative in said first time interval for connecting said first station storage capacitor to said first common bus and for connecting said first station circuit amplifying means output to said second common bus, means operative in said second time interval for connecting said second station circuit storage capacitor to said first common bus and said second station amplifying means output to said second common bus, means for connecting said first station circuit storage capacitor to said first common bus in said third time interval, means for connecting said second station circuit storage capacitor to said first common bus in said fourth time interval, said signal transfer circuit comprising first signal transfer means for transferring a signal from said first station to said second station comprising means operative in said first time interval including first, second and third storage capacitors, means for applying the signal appearing on said first common bus in said first time interval to said first storage capacitor, means for applying the signal appearing on said second common bus in said first time interval to each of said second and third storage capacitors, and means operative in said third time interval comprising means for serially connecting said first, second and third storage capacitors to subtract the signal on said first storage capacitor from the sum of the signals on said second and third storage capacitors and means for applying the resultant difference signal from said serially connected capacitors to said first common bus, and second signal transfer means for transferring a signal from said second station to said first station comprising means operative in said second time interval including fourth, fifth and sixth storage capacitors, means for applying the signal appearing on said first common bus in said second time interval to said fourth storage capacitor and means for applying the signal appearing on said second common bus in said second time interval to each of said fifth and sixth storage capacitors, and means operative in said fourth time interval comprising means for serially connecting said fourth, fifth and sixth storage capcitators to subtract the signal on said fourth storage capacitor from the sum of the signals on said fifth and sixth storage capacitors, and means for applying the resultaNt difference signal from said serially connected fourth, fifth and sixth storage capacitors to said first common bus.