Control apparatus for an environmental data system

Claim 2

An electrical control circuit selectively controlling clock pulses effective to readout stored digital data, comprising: clock means continuously providing periodic pulses, first and second output terminals, an input terminal for receiving a circuit start signal of a predetermined duration corresponding to the amount of the stored data, means including a first gate and a first flip-flop both being responsive to the clock pulses and the start signal so as to initially start circuit operation only during an interval prior to the occurrence of the first full clock pulse following the application of said circuit start signal to said input terminal, means including second and third gates and a second flip-flop directing said first full clock pulse through said second and third gates to said first output terminal during the initial portion of the start signal, said third gate and second flipflop cooperating to block subsequent clock pulses from reaching said first output terminal, and means including a fourth gate and said second flip-flop cooperating to block said first full clock pulse from reaching the second output terminal, and thereafter cooperating with said second gate to direct all subsequent clock pulses to the second output terminal for the remaining portion of the duration of the start signal.

Claim 3

The control circuit of claim 1 wherein the first and second flip-flops are connected to the input terminal such that they are reset and clamped in the absence of a circuit start signal.

Claim 4

The control circuit of claim 1 wherein the input terminal is connected to the first gate and to the second flip-flop, with the first gate changing its output to toggle the first flip-flop on the first space interval between periodic clock pulses following the application of a start signal to the input terminal, said first flip-flop being connected to the second gate, enabling said second gate when it toggles to pass the first full clock pulse to the first output terminal via the second and third gates.

Claim 5

The control circuit of claim 3 wherein the third gate is connected to the second flip-flop such that the clock pulse applied to the first output terminal toggles the second flip-flop upon its termination, with the toggling of the second flip-flop blocking the third gate and enabling the fourth gate to pass clock pulses from the enabled second gate.

Claim 6

Electrical control apparatus for controlling the transfer and reading out of digital data from a storage means, comprising: storage means containing digital data, shift register means, gate means connected between said storage means And said shift register means, and control means having a first output terminal connected to said gate means, a second output terminal connected to said shift register means, an input terminal adapted to receive a start signal for initiating the transfer of data from the storage means to said shift register means, and the reading out of the data from the shift register means, clock means providing periodic pulses, means including a first gate and a first flip-flop starting the circuit operation so as to be initially responsive to only the first full clock pulse following the application of a circuit start signal to said input terminal, means including second and third gates and a second flip-flop directing said first full clock pulse through said second and said third gates to said first output terminal during the initial portion of the start signal, said third gate and second flip-flop cooperating to block subsequent clock pulses from reaching said first output terminal, and means including a fourth gate and said second flip-flop cooperating to block said first full clock pulse from reaching the second output terminal, and thereafter cooperating with said second gate to direct all subsequent clock pulses to the second output terminal for the remaining portion of the duration of the start signal.

Claim 7

Electrical control apparatus for controlling the transfer and reading out of digital data from a storage means, comprising: storage means containing digital data, shift register means, gate means connected between said storage means And said shift register means, and control means having a first output terminal connected to said gate means, a second output terminal connected to said shift register means, an input terminal adapted to receive a start signal for initiating the transfer of data from the storage means to said shift register means, and the reading out of the data from the shift register means, clock means providing periodic pulses, means including a first gate and a first flip-flop starting the circuit operation so as to be initially responsive to only the first full clock pulse following the application of a circuit start signal to said input terminal, means including second and third gates and a second flip-flop directing said first full clock pulse through said second and said third gates to said first output terminal during the initial portion of the start signal, said third gate and second flip-flop cooperating to block subsequent clock pulses from reaching said first output terminal, and means including a fourth gate and said second flip-flop cooperating to block said first full clock pulse from reaching the second output terminal, and thereafter cooperating with said second gate to direct all subsequent clock pulses to the second output terminal for the remaining portion of the duration of the start signal.