US3740658A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Temperature compensated amplifying circuit
Assignee: Motorola Solutions Inc
•
Filing: 1970-03-03
•
Granted: 1973-06-19
•
Expires: 1990-03-03
Abstract
Abstract An integrated circuit differential amplifier incorporates dual current sources having opposite temperature coefficients to compensate the operation of the differential amplifier for variations in ambient temperature. The output of the differential amplifier is applied through a coupling network to a peak-to-peak amplifying detector subject to input impedance variations, with the coupling network including an impedance connected in parallel with the input impedance of the detector circuit and of smaller value.
Inventors
- 👤 R Loving
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 14:25
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/45; H03F3/45071; H03F3/45479; H03F2203/00; H03F2203/45; H03F2203/45508
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
353 words
An integrated temperature compensated amplifier circuit including in combination: first and second voltage supply terminals for connection to points of suitable operating potential, said operating potential being subject to variation with variations in temperature; voltage divider means including resistance means and a predetermined number of transistor diode means connected in series between said first and second voltage supply terminals in the order named, with said resistance means being connected with a first one of said predetermined number of transistor diode means at a first junction; differential amplifier means including at least first and second transistors, each having base, collector and emitter electrodes, with the emitters thereof being coupled in common at a second junction; further resistance means coupling the base electrodes of said first and second transistors with said first junction; a first current source including a third transistor having collector, base, and emitter electrodes, the collector thereof being coupled with said second junction, the emitter thereof being coupled with said second voltage supply terminal, and the base thereof being coupled with said transistor diode means to cause the collector current of said third transistor to vary with variations in current in said transistor diode means caused by variations in temperature, so that the collector current of said third transistor has a predetermined temperature coefficient, said predetermined number of transistor diode means being selected to provide temperature compensations for the emitter-base junctions of said first and second transistor means and said third transistor; means for coupling the collector electrodes of said first and second transistors with said first voltage supply terminal; resistor means coupled between said second junction and said second voltage supply terminal and having an opposite temperature coefficient to the temperature coefficient of said third transistor, said resistor means operating as a second current source for the differential amplifier; and means for applying input signals to the base electrode of one of said first and second transistors, with the predetermined number of transistor diode means operating as an alternating current bypass circuit for the input signals with respect to the base electrode of the other of said first and second transistors.
Claim 2
Dependent Claim
353 words
An integrated temperature compensated amplifier circuit including in combination: first and second voltage supply terminals for connection to points of suitable operating potential, said operating potential being subject to variation with variations in temperature; voltage divider means including resistance means and a predetermined number of transistor diode means connected in series between said first and second voltage supply terminals in the order named, with said resistance means being connected with a first one of said predetermined number of transistor diode means at a first junction; differential amplifier means including at least first and second transistors, each having base, collector and emitter electrodes, with the emitters thereof being coupled in common at a second junction; further resistance means coupling the base electrodes of said first and second transistors with said first junction; a first current source including a third transistor having collector, base, and emitter electrodes, the collector thereof being coupled with said second junction, the emitter thereof being coupled with said second voltage supply terminal, and the base thereof being coupled with said transistor diode means to cause the collector current of said third transistor to vary with variations in current in said transistor diode means caused by variations in temperature, so that the collector current of said third transistor has a predetermined temperature coefficient, said predetermined number of transistor diode means being selected to provide temperature compensations for the emitter-base junctions of said first and second transistor means and said third transistor; means for coupling the collector electrodes of said first and second transistors with said first voltage supply terminal; resistor means coupled between said second junction and said second voltage supply terminal and having an opposite temperature coefficient to the temperature coefficient of said third transistor, said resistor means operating as a second current source for the differential amplifier; and means for applying input signals to the base electrode of one of said first and second transistors, with the predetermined number of transistor diode means operating as an alternating current bypass circuit for the input signals with respect to the base electrode of the other of said first and second transistors.
Claim 3
Dependent Claim
89 words
The combination according to claim 1 further including transistor utilization circuit means having an input impedance subject to variation with beta and temperature changes; means coupled with the collector of one of said first and second transistors for supplying the amplified output signals from said differential amplifier to said transistor utilization circuit means; and compensation impedance means coupled in parallel with the input impedance of said utilization circuit means and having a lower impedance than said input impedance for swamping out the effect of variations in said input impedance.
Claim 4
Dependent Claim
70 words
The combination of claim 1 wherein the differential amplifier includes fourth and fifth transistors coupled in a Darlington configuration to said first and second transistors, respectively, and each having base electrodes, with said first junction being coupled with the base electrodes of said fourth and fifth transistors by said further resistance means and said input signal being applied to the base electrode of one of said fourth and fifth transistors.
Claim 5
Dependent Claim
91 words
The combination according to claim 3 wherein said voltage divider includes said first resistance means connected in series with three transistor diode means and wherein said first juNction on said voltage divider is at a potential above the potential of said second voltage supply terminal as established by said three series-connected transistor diode means, said first resistance means of said voltage divider and the resistor means of said second current source having one temperature coefficient and said transistor diode means and said third current source transistor having an opposite temperature coefficient.
Claim 6
Dependent Claim
119 words
A circuit for reducing input impedance variations in a transistor circuit subject to variations with beta and temperature changes including in combination: transistor utilization circuit means having a base-emitter circuit exhibiting an input impedance subject to substantial variation with beta and temperature changes; input circuit means for supplying AC signals to the base-emitter circuit of said transistor utilization circuit means; compensation impedance means coupled in parallel with the base-emitter circuit of the transistor utilization circuit means and having a lower impedance than said input impedance for swamping out the effect of variations in said input impedance; and filter means for coupling the input circuit means to the parallel combination of the utilization circuit means and the compensation impedance means.
Claim 7
Dependent Claim
119 words
A circuit for reducing input impedance variations in a transistor circuit subject to variations with beta and temperature changes including in combination: transistor utilization circuit means having a base-emitter circuit exhibiting an input impedance subject to substantial variation with beta and temperature changes; input circuit means for supplying AC signals to the base-emitter circuit of said transistor utilization circuit means; compensation impedance means coupled in parallel with the base-emitter circuit of the transistor utilization circuit means and having a lower impedance than said input impedance for swamping out the effect of variations in said input impedance; and filter means for coupling the input circuit means to the parallel combination of the utilization circuit means and the compensation impedance means.
Claim 8
Dependent Claim
63 words
The combination according to claim 5 wherein the filter means includes first and second capacitances coupled together at a common junction, with the first capacitance coupled with the input circuit and with the second capacitance coupled with the utilization circuit means, and the compensation impedance means being coupled between a point of reference potential and the junction of the first and second capacitances.
Claim 9
Dependent Claim
79 words
The combination according to claim 6 wherein the utilization circuit means is a transistor amplifying detector circuit and the first capacitance is a frequency shaping capacitance having a high pass filter characteristic with a low frequency rolloff and the second capacitance is a charge accumulating capacitance, the first capacitance being substantially smaller than the second capacitance, with the impedance being a resistance means the value of which is small compared with the input impedance of the utilization circuit means.
References Cited (Backward Citations)
US3522548A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-06-18 | 1976-12-18 | 1977-06-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-06-18 | 1980-12-18 | 1981-06-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-06-18 | 1984-12-18 | 1985-06-19 | $7700.00 | Window Closed / Lapsed |