Feature parameter measurement by line scanning

Claim 3

A method as set forth in claim 1 comprising the further step of electronically gating the detected signal pulses whereby each is replaced by a train of pulses the number of which is proportional to the duration of the original pulse.

Claim 4

A method as set forth in claim 1 comprising the further step of electronically gating the said difference pulses to thereby replace each by a train of pulses the number of which is proportional to the duration of the original difference pulse.

Claim 5

A method as set forth in claim 1 further comprising the steps of generating single count pulse from each detected signal pulse and accumulating the count pulses during a field scan to form a second output signal.

Claim 6

A method as set forth in claim 2 further comprising the steps of generating a single count pulse from each detected signal pulse and accumulating the count pulses during a field scan to form a second output signal.

Claim 7

A method as claimed in claim 4 further comprising the step of dividing one output signal by the other.

Claim 8

A method as set forth in claim 1 further comprising the steps of detecting whenever there is coincidence of the leading edge of a detected signal pulse and the leading edge of a coincident detected pulse delayed from the previous line scan by one line scan period and generating a count pulse whenever there is coincidence, detecting whenever there is coincidence of the trailing edges of coincident detected signal pulses from the current line scan and from the previous line scan delayed by one line scan period and generating a count pulse whenever there is coincidence, gating the delayed pulses by the inverse of those occurring during the next line scan and thereby generating a difference pulse of duration equal to the duration of any delayed pulse or part thereof which is not coincident with a detected pulse on the said next line scan thereby to generate a second series of difference pulses and accumulating the first and second series of difference pulses and said count pulses during a field scan to produce a third output signal.

Claim 9

A method as set forth in claim 7 comprising the further step of electronically gating the detected signal pulses whereby each is replaced by a train of pulses the number of which is proportional to the duration of the original pulse.

Claim 10

A method as set forth in claim 8 comprising the further steps of measuring any time difference between the appearance of the leading edge of a detected pulse and that of a coincident delayed detected pulse (delayed by one line scan period from the previous line scan) measuring any time difference between the appearance of the trailing edges of the two pulses, generating an incremental count pulse whenever the time differeNce is less than the gating signal period and accumulating the incremental count pulses with the said difference pulses and count pulses to form the third output signal.

Claim 11

A method as set forth in claim 9 wherein the incremental count pulses are accumulated in a subsidiary counter during each field scan and only the whole number content of the final count value in the counter is taken into account in computing the third output signal.

Claim 12

A method as set forth in claim 10 wherein the value of each incremental count pulse is 0.3.

Claim 13

A method as set forth in claim 1 comprising the further step of size discriminating the detected signal pulses before the step of comparing them with those delayed from the previous line scan.

Claim 14

A method as set forth in claim 1 comprising the further steps of associating the difference pulses arising from scanning each feature and accumulating separately the difference pulses associated with each feature, recirculating the separate accumulating signals from line to line in a memory device, comparing the detected signal pulses from each line scan with those from the previous line scan and generating an end-of-scanning pulse for each detected feature some time after the last detected pulse has been received for each feature, addressing the memory with each end-of-scanning pulse and releasing therefrom the accumulated difference pulses relating to that feature.

Claim 15

A method as set forth in claim 13 comprising the further step of size discriminating the detected signal pulses before the step of comparing them with those delayed from the previous line scan.

Claim 16

A method as set forth in claim 13 comprising the further steps of generating a count pulse for each detected signal pulse, associating the count pulses from the detected signal pulses arising from scanning each feature and accumulating separately the count pulses associated with each feature, recirculating the separate accumulating signals from line to line in a second memory device and addressing the second memory device at the same time as the first is addressed for each feature and releasing therefrom the accumulated count pulses relating to that feature.

Claim 17

A method as set forth in claim 10 further comprising the steps of accumulating any pulses arising from each detected signal pulse to form an incremental accumulation signal, associating the incremental accumulation signals arising from scanning each feature and accumulating separately the incremental accumulation signals associated with each feature, recirculating the separate accumulating signals from line to line in a memory device, comparing the detected signal pulses from each line scan and generating an end-of-scanning pulse for each detected feature some time after the last detected pulse has been received for each feature, addressing the memory with each end-of-scanning pulse and releasing therefrom the accumulation of incremental accumulation signals relating to that feature.

Claim 18

Circuit arrangement for analysing features in a field comprising means for scanning the field or an image thereof and generating thereby a video signal, of the field, voltage comparison means for comparing the video signal amplitude excursion with a reference voltage and generating a detected pulse whenever the comparison criterion is satisfied, delay means for delaying the detected pulses by one line scan period, gating means adapted to gate the detected pulses with the inverse of the pulses from the delay means thereby to remove detected pulses and portions thereof which are coincident with delayed detected pulses and means for accumulating the pulses and portions thereof which are passed by the gating means.

Claim 19

Circuit arrangement for analysing features in a field comprising means for scanning the field or an image thereof and generating thereby a video signal, of the field, voltage comparison means for comparing the video signal amplitude excursion with a reference voltage and generating a detected pulse whenever the comparison criterion is satisfied, delay means for delaying the detected pulses by one line scan period, gating means adapted to gate the detected pulses with the inverse of the pulses from the delay means thereby to remove detected pulses and portions thereof which are coincident with delayed detected pulses and means for accumulating the pulses and portions thereof which are passed by the gating means.

Claim 20

Circuit arrangement as set forth in claim 17 further comprising gating means for electronically chopping the gated detected pulses and pulse portions to form pulse trains, the number of pulses in each train being proportional to the duration of the original pulse or pulse portion.

Claim 21

Circuit arrangement as set fOrth in claim 18 wherein the accumulating means comprises a pulse counter.

Claim 22

Circuit arrangement as set forth in claim 19 further comprising means for deriving a count pulse for each detected pulse and a second pulse counter for counting said count pulses to thereby generate a digital signal proportional to the horizontally projected length of the detected feature content.

Claim 23

Circuit arrangement as set forth in claim 17 further comprising means for detecting coincidence of the leading edge of a detected signal pulse and that of a delayed detected signal pulse, a first counter for counting each detected coincidence, a second coincidence detector for detecting coincidence of the trailing edge of a detected signal pulse and that of a delayed detected signal pulse, a second counter for counting each detected coincidence, second gating means adapted to gate the delayed detected signal pulses by the inverse of the detected signal pulses occurring on the next line scan and thereby removing delayed detected pulses and portions thereof which are coincident with detected pulses on the next line scan, second means for accumulating the pulses and portions thereof which are passed by the second gating means, and an overall accumulator for accumulating the signals from said first and second accumulating means and said first and second counters, to form a fourth output signal.

Claim 24

Circuit arrangement as set forth in claim 21 further comprising means for measuring any time difference between the detection of a leading edge of a detected pulse and that of a coincident delayed detected pulse, second time measuring means for measuring any time difference between the detection of trailing edges of the two coincident pulses, means for generating an incremental count pulse whenever the difference is less than the gating signal period, and means for combining said incremental count pulses so produced with the other count pulses in said overall accumulator.

Claim 25

Circuit arrangement as set forth in claim 22 further comprising means for electronically chopping the detected signal pulses or delayed detected pulses, the number of pulses replacing each detected or delayed detected pulse being proportional to the duration of the original pulse.

Claim 26

Circuit arrangement as set forth in claim 23 wherein the said first and second and overall accumulators are pulse counters.