Dielectric isolation processes

Abstract

Abstract A PROCESS FOR FABRICATING DIELECTRICALLY ISOLATED CIRCUIT ELEMENTS FOR INTEGRATED CIRCUITS. AN ETCH-RESISTANT LAYER OF SILICON NITRIDE IS FORMED OVER ONE SURFACE OF A MONOCRYSTALLINE SEMICONDUCTOR SUBSTRATE AND A LAYER OF POLYCRYSTALLINE MATERIAL IS THEREAFTER DISPOSITED OVER THE SILICON NITRIDE LAYER. A SUBSTANTIAL PORTION IS REMOVED FROM THE OTHER SURFACE OF THE SUBSTRATE TO LEAVE A RELATIVELY THIN LAYER THEREOF. AN ETCH-RESISTANT MASK IS THEN FORMED ON THE THEREBY EXPOSED SURFACE OF THIS REMAINING THIN SUBSTRATE LAYER AND A PATTERN OF ISOLATION MOATS IS ETCHED THROUGH THE EXPOSED PORTIONS OF THE SUBSTRATE LAYER THEREBY TO FORM DISCRETE ISLANDS EACH COMPRISING SUBSTRATE MATERIAL WHILE THE SILICON NITRIDE LAYER IS SUBSTANTIALLY UNAFFECTED BY THE ETCHANT AND FUNCTIONS AS AN ETCH STOP. A DIELECTRIC LAYER IS THEREAFTER FORMED OVER THE EXPOSED SURFACES OF THE ISLANDS, AND A LAYER OF POLYCRYSTALLINE MATERIAL IS DEPOSITED OVER THE DIELECTRIC LAYER. THE FIRST POLYCRYSTALLINE MATERIAL IS THEN REMOVED BY ETCHING WHICH EXPOSES THE SILICON NITRIDE LAYER WHICH AGAIN SERVES AS AN ETCH STOP AND THE MONOCRYSTALLINE ISLANDS ARE DIELECTRICALLY ISOLATED FROM EACH OTHER IN A COMMON BODY OF POLYCRYSTALLINE MATERIAL WHEREAFTER THE CIRCUIT ELEMENTS ARE FORMED IN THE MONOCRYSTALLINE ISLANDS.

Inventors

• 👤 K Bean
• 👤 P Gleim

Bibliographic Details