High voltage operational amplifier

Claim 1

A monolithically fabricated amplifier circuit for use in combination with a differential signal source generating differential input signals, and a load serving as a source for currents and a sink for currents, and a potential source having a first potential level and a second potential level more positive than said first potential level, said amplifier comprising: input terminal means connectable to the differential signal source for receiving the differential input signals; output terminal means connectable to a load; potential source terminal means connectable to the potential source for receiving the first potential level and the second potential level which is more positive than said first potential level; a bias network connected between said first potential level and said second potential level for generating a plurality of bias currents and reference voltages, and further including, start up means connected to said first potential level and to said second potential for providing an initial source of current to said bias means for activating said bias means, a plurality of emitter followers having base, collector and emitter electrodes, and respective base electrodes responsive to certain of said reference voltages for generating an equal plurality of additional reference voltages at respective emitter electrodes, and said emitter of one emitter follower being connected to the collector of another emitter follower, and means for connecting said emitter of said second emitter follower to said first potential level for limiting the current flowing in said first and second emitter followers during quiesecent condition, and turn on protect means connected between said collector of said first emitter follower and said second potential level for limiting said current flow through said first emitter follower during the build up of said bias currents through said bias means; a differential amplifier having: a first stage connected input terminal said inputterminal means and responsive to one of said differential input signals, and said first stage further including, a first transistor having collector, baseand emitter electrodes, and forming at least a base-collector junction and a base-emitter junction,and said emitter electrode having a stray capacitancevalue, and said base electrode beingresponsive to one of said differential inputsignals, a first independent input bias terminal connected to said emitter of said first transistor, means responsive to said bias network for establishing a constant current flow from said first bias terminal. a first current output means for rendering available the output signal fRom said first stage, and a first input diode connected across said emitter-base junction of said first transistor for providing a current path for discharging said stray capacitance into said signal source, a second stage connected to said input terminal means and responsive to another of said differential input signals, and said second stage further including, a second transistor having collector, base and emitter electrodes, and forming at least a base-collector junction and a base-emitter junction, and said emitter electrode having a stray capacitance value, and said base electrode being responsive to one of said differential input signals; a second independent input bias terminal connected to said emitter of said second transistor, means responsive to said bias network for establishing a constant current flow from said second bias terminal, a second current output means for rendering available the output signal from said second stage, and a second input diode connected across said emitter-base junction of said second transistor for providing a current path for discharging said stray capacitance into said signal source, a common input bias means responsive to said bias network for supplying a constant current to said first stage and said second stage; means responsive to said bias network and further responsive to said first current output means and to said second current output means for converting said output signals from each stage of said differential amplifier to a single ended output signal; and output circuit means responsiveto said converting means for providing drive current to said output circuit means and said output circuit means including: A cascode connected amplifier stage having a first transistor and a second transistor and having at least one resistor connected in the current path between one of the voltage supply levels and the output terminal, and connected intermediate the emitter of the first transistor and the collector of the second transistor, said first transistor being responsive in part to one of said reference voltages and to said second transistor, and said second transistor responsive to the single ended output signal from the converting means; an output emitter follower stage connected intermediate said collector of said first transistor and said output terminal including a resistor in the emitter lead of the emitter follower; a passive current path connected in parallel with said output emitter follower stage for limiting current in said output emitter follower stage whereby, the emitter resistor in combination with the passive current path limits the current flowing in the emitter follower stage and the resistor connected between the first and second transistors in the cascode amplifier in combination with said reference voltage (V7) limits the current in the passive current path.