Gate circuit

Claim 2

An improved gate circuit comprising at least one series element composed of a pair of diodes connected together by like electrodes, and having their opposed electrodes connected respectively as input and output terminals of said series element, means for applying a signal to be sampled to said input terminal, means for applying gate pulses to the junction between said diodes of said series element, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency bandwidth of said signal to be sampled, means for normally biasing said diodes into a conductive state during the periods of said gate pulses and a capacitor connected between said output terminal and ground, wherein said means for applying gate pulses comprises a gate pulse generator and a gating diode interconnected between said gate pulse generator and said junction between said like electrodes of said diodes, thereby preventing a reflection of said measuring signals and improving the high frequency characteristics of said gate circuit.

Claim 3

An improved gate circuit according to claim 1, further comprising means for adjusting the bias voltage on said gating diode for controlling the amplitude and slope of said gate pulses.

Claim 4

An improved gate circuit comprising at least one series element composed of a pair of diodes connected together by like electrodes, and having their opposed electrodes connected respectively as input and output terminals of said series element, means for applying measuring signals to said input terminal, means for applying gate pulses to the junction between said diodes of said series element, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band-width of said measuring signals, means for normally biasing said diodes in a nonconductive state, means for biasing said diodes into a conductive state during the period of said gate pulse, and a capacitor connecting said output terminal to ground, and further comprising a shunt capacitor having a value of at least 300 PF and coupled between said junction between like diode electrodes and ground, thereby preventing a leakage signal at said output terminal and improving the frequency characteristics of said gate circuit.

Claim 5

An improved gate circuit comprising at least one series element composed of a pair of diodes connected together by like electrodes, and having their opposed electrodes connected respectively as input and output terminals of said series element, means for applying measuring signals to said input terminal, means for applying gate pulses to the junction between said diodes of said series element, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band-width of said measuring signals, means for normally biasing said diodes in a nonconductive state, means for biasing said diodes into a conductive state during the period of said gate pulse, and a capacitor connecting said output terminal to ground, and further comprising a shunt capacitor having a value of at least 300 PF and coupled between said junction between like diode electrodes and ground, thereby preventing a leakage signal at said output terminal and improving the frequency characteristics of said gate circuit.

Claim 6

The invention as set forth in claim 3, in which said means for applying said gate pulses comprises a gate pulse generator and a gating diode coupled between said gate pulse generator and said junction between like diode electrodes, thereby preventing a reflection of said measuring signals and improving the high frequency characteristics of sAid gate circuit.

Claim 7

An improved gate circuit according to claim 4, further comprising means for adjusting the bias voltage on said gating diode for controlling the amplitude and slope of said gate pulses.

Claim 8

An improved gate circuit according to claim 5, further comprising means for adjusting the bias current of said gating diode for controlling the amplitude and slope of said gate pulses.

Claim 9

An improved gate circuit comprising a pair of series elements wherein one series element is composed of a pair of diodes having their anodes connected together and another series element is composed of a pair of diodes having their cathodes connected together and wherein said two series elements are connected in parallel, an input terminal connected to one connecting point of said two series elements, an input terminal connected to the other connecting point of said two series elements, means for applying measuring signals to said input terminal, means for applying gate pulses to each connecting point between like electrodes of said diodes of each series element, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band-width of said measuring signals, means for normally biasing said diodes in a nonconductive state, means for biasing said diodes in a conductive state during the period of said gate pulse, and a capacitor connected between said output terminal and ground, wherein said means for applying gate pulses comprises a gate pulse generator and a pair of gating diodes interconnected respectively between said gate pulse generator and said junctions between said like electrodes of said diodes, thereby preventing a reflection of said measuring signals and improving the high frequency characteristics of said gate circuit.

Claim 10

An improved gate circuit comprising a pair of series elements wherein one series element is composed of a pair of diodes having their anodes connected together and another series element is composed of a pair of diodes having their cathodes connected together and wherein said two series elements are connected in parallel, an input terminal connected to one connecting point of said two series elements, an input terminal connected to the other connecting point of said two series elements, means for applying measuring signals to said input terminal, means for applying gate pulses to each connecting point between like electrodes of said diodes of each series element, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band-width of said measuring signals, means for normally biasing said diodes in a nonconductive state, means for biasing said diodes in a conductive state during the period of said gate pulse, and a capacitor connected between said output terminal and ground, wherein said means for applying gate pulses comprises a gate pulse generator and a pair of gating diodes interconnected respectively between said gate pulse generator and said junctions between said like electrodes of said diodes, thereby preventing a reflection of said measuring signals and improving the high frequency characteristics of said gate circuit.

Claim 11

An improved gate circuit according to claim 7, further comprising means for adjusting a bias voltage on each said gating diode, for controlling the amplitude and slope of said gate pulses.

Claim 12

An improved gate circuit comprising a pair of series elements wherein one series element is composed of a pair of diodes having their anodes connected together and another series element is composed of a pair of diodes having their cathodes connected together, and wherein said two series elements are connected in parallel, an input terminal connected to one connecting point of said two series elements, an output terminal connected to the other connecting point of said two series elements, means for applying measuring signals to said input terminal, means for applying gate pulses to each connecting point between like electrodes of said diodes of each series element, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band-width of said measuring signals, means for normally biasing said diodes in a nonconductive state, means for biasing said diodes in a conductive state during the period of said gate pulse, and a capacitor connected between said output terminal and ground, and a pair of shunt capacitors each having a value of at least 300 PF and being coupled respectively between said junctions between like diode electrodes and ground, thereby preventing a leakage signal at said output terminal and improving the frequency characteristics of said gate circuit.

Claim 13

An improved gate circuit comprising a pair of series elements wherein one series element is composed of a pair of diodes having their anodes connected together and another series element is composed of a pair of diodes having their cathodes connected together, and wherein said two series elements are connected in parallel, an input terminal connected to one connecting point of said two series elements, an output terminal connected to the other connecting point of said two series elements, means for applying measuring signals to said input terminal, means for applying gate pulses to each connecting point between like electrodes of said diodes of each series element, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band-width of said measuring signals, means for normally biasing said diodes in a nonconductive state, means for biasing said diodes in a conductive state during the period of said gate pulse, and a capacitor connected between said output terminal and ground, and a pair of shunt capacitors each having a value of at least 300 PF and being coupled respectively between said junctions between like diode electrodes and ground, thereby preventing a leakage signal at said output terminal and improving the frequency characteristics of said gate circuit.

Claim 14

The invention as set forth in claim 9, in which said means for applying said gate pulses comprises a gate pulse generator and a pair of gating diodes coupled respectively between said gate pulse generator and said junctions between like diode electrodes, thereby preventing a reflection of said measuring signals and improving the high frequency characteristics of said gate circuit, and further comprising means for adjusting a bias voltage on said gating diodes for controlling the amplitude and slope of said gate pulses.

Claim 15

An improved gate circuIt according to claim 10, further comprising means for adjusting the bias current of said gating diode for controlling the amplitude and slope of said gate pulses.

Claim 16

An improved gate circuit comprising first and second series elements each including a diode and a resistor, said series elements being connected in parallel so that said diodes are arranged with opposing polarities in said parallel combination of series elements, an input terminal connected to one end of said parallel combination, an output terminal connected to the other end of said parallel combination, means for applying measuring signals to said input terminal, means for applying gate pulses to each connecting point between said diode and said resistor in each said series element, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band width of said measuring signals, means for normally biasing said diodes in a nonconductive state, means for biasing said diodes into a conductive state during the periods of said gate pulses, a capacitor connected from said output terminal to ground, wherein said means for applying gate pulses comprises a gate generator circuit and a pair of gating diodes coupled respectively between said gate generator circuit and the junctions between said diode and resistor in each said series element, thereby preventing a reflection of said measuring signals at the gate pulse generator and improving the high frequency characteristics of said gate circuit.

Claim 17

An improved gate circuit comprising first and second series elements each including a diode and a resistor, said series elements being connected in parallel so that said diodes are arranged with opposing polarities in said parallel combination of series elements, an input terminal connected to one end of said parallel combination, an output terminal connected to the other end of said parallel combination, means for applying measuring signals to said input terminal, means for applying gate pulses to each connecting point between said diode and said resistor in each said series element, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band width of said measuring signals, means for normally biasing said diodes in a nonconductive state, means for biasing said diodes into a conductive state during the periods of said gate pulses, a capacitor connected from said output terminal to ground, wherein said means for applying gate pulses comprises a gate generator circuit and a pair of gating diodes coupled respectively between said gate generator circuit and the junctions between said diode and resistor in each said series element, thereby preventing a reflection of said measuring signals at the gate pulse generator and improving the high frequency characteristics of said gate circuit.

Claim 18

An improved gate circuit according to claim 12, further comprising means for adjusting a bias voltage of said gating diodes for controlling the amplitude and a sharpness of said gate pulses.

Claim 19

An improved gate circuit comprising at least one series element composed of a first diode and a resistor, one terminal of said diode being connected to one terminal of said resistor, an input terminal connected to the other terminal of said diode, an output terminal connected to the other terminal of said resistor, means for applying measuring signals to said input terminal, means for applying gate pulses to a connecting point between said diode and said resistor, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band width of said measuring signals, means for normally biasing said diode in a nonconductive state, means for biasing said diode into a conductive state during the periods of said gate pulses, a capacitor connected from said output terminal to ground, and a shunt element having a capacitance of at least 300 PF, said shunt element being connected between said connecting point between said first diode and said resistor and ground, thereby preventing a leakage signal from appearing on said output terminal and improving the frequency characteristics of said gate circuit.

Claim 20

An improved gate circuit comprising at least one series element composed of a first diode and a resistor, one terminal of said diode being connected to one terminal of said resistor, an input terminal connected to the other terminal of said diode, an output terminal connected to the other terminal of said resistor, means for applying measuring signals to said input terminal, means for applying gate pulses to a connecting point between said diode and said resistor, wherein said gate pulses satisfy the relation Tau fo about 0.44 where Tau is the application period of said gate pulses and fo is the frequency band width of said measuring signals, means for normally biasing said diode in a nonconductive state, means for biasing said diode into a conductive state during the periods of said gate pulses, a capacitor connected from said output terminal to ground, and a shunt element having a capacitance of at least 300 PF, said shunt element being connected between said connecting point between said first diode and said resistor and ground, thereby preventing a leakage signal from appearing on said output terminal and improving the frequency characteristics of said gate circuit.

Claim 21

An improved gate circuit according to claim 14, wherein said means for applying gate pulses comprises a gate generator circuit and a gating diode coupled between said gate generator circuit and the junction between said first diode and resistor, thereby preventing a reflection of said measuring signals at the gate pulse generator and improving the high frequency characteristics of said gate circuit, and further comprising means for adjusting a bias voltage of said gating diode for controlling the amplitude and slope of said gate pulses.

Claim 22

An improved gate circuit according to claim 15, further comprising means for adjusting the bias current of said gating diode for controlling the amplitude and sharpness of said gate pulses.