US3737640A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Electronic feedback controlled time-division multiplier and/or divider
Assignee: Monsanto Co
•
Filing: 1971-12-29
•
Granted: 1973-06-05
•
Expires: 1991-12-29
Abstract
Abstract An electronic system for simultaneously multiplying and dividing analog signals which comprises a closed loop circuit in which the division is accomplished by introducing the dividend signal into the main signal translating portion of the circuit and the divisor signal into the feedback portion of the circuit. The output signal of this closed loop circuit has a varying duty cycle which is proportional to the quotient of these signals, and this quotient is multiplied by a third signal in an electronic switch which is connected to the output of the above closed loop circuit.
Inventors
- 👤 R Pao
- 👤 W Burgener
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 02:26
CPC Classifications
G; G06; G06G; G06G7/00; G06G7/12; G06G7/16; G06G7/161
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
201 words
A system for dividing a first or a analog input signal by a second or b analog input signal including, in combination: a. a closed loop circuit comprising a main signal translating portion and a feedback portion, b. means in said main signal translating portion for receiving said a analog input signal, c. error signal generating means in said main signal translating portion, connected to said receiving means, for comparing said a analog input signal with a feedback signal, Vf, generated in said feedback loop portion thereby to generate an error signal, d. means in said main signal translating portion and coupled to said error signal generating means for modulating said error signal by a selected waveform to produce a variable duty cycle output signal, and e. means in said feedback portion for modulating said b analog signal by said variable duty cycle output signal for generating said feedback signal, Vf, whereby said error signal continuously forces Vf to equal a, and the variable duty cycle output signal at the output of said modulating means has a duty cycle which is proportional to a/b and is substantially independent of the precise shape of the waveform utilized to modulate said error signal.
Claim 2
Independent Claim
201 words
A system for dividing a first or a analog input signal by a second or b analog input signal including, in combination: a. a closed loop circuit comprising a main signal translating portion and a feedback portion, b. means in said main signal translating portion for receiving said a analog input signal, c. error signal generating means in said main signal translating portion, connected to said receiving means, for comparing said a analog input signal with a feedback signal, Vf, generated in said feedback loop portion thereby to generate an error signal, d. means in said main signal translating portion and coupled to said error signal generating means for modulating said error signal by a selected waveform to produce a variable duty cycle output signal, and e. means in said feedback portion for modulating said b analog signal by said variable duty cycle output signal for generating said feedback signal, Vf, whereby said error signal continuously forces Vf to equal a, and the variable duty cycle output signal at the output of said modulating means has a duty cycle which is proportional to a/b and is substantially independent of the precise shape of the waveform utilized to modulate said error signal.
Claim 3
Dependent Claim
58 words
The system defined in claim 1 wherein said error signal generating means includes a differential comparator having one input thereof connected to receive said a analog input signal and a second input thereof connected to said feedback portion to receive said feedback signal, Vf, and to generate an output signal proportional to the difference between a and Vf.
Claim 4
Dependent Claim
61 words
The system defined in claim 2 wherein said error signal generating means furtHer includes means connected between said differential comparator and said modulating means for integrating said output signal from said differential comparator and continuously changing when said output signal is not zero to force Vf towards a and force the output of said modulating means to be proportional to a/b.
Claim 5
Dependent Claim
67 words
The system defined in claim 1 wherein said modulating means comprises a voltage-to-duty cycle converter including a differential comparator connected to receive said error signal at one input thereof and further connected to a triangular wave generating means, whereby said error signal and a triangular wave clock signal from said generating means drive said differential comparator between two D.C. levels at a duty cycle proportional to a/b.
Claim 6
Dependent Claim
103 words
The system defined in claim 1 wherein said means in said feedback portion for modulating said b analog signal includes: a. switch means having an input electrode connected to receive said b analog signal and a control electrode connected to receive said variable duty cycle output signal from said modulating means, whereby said b analog signal is modulated in accordance with the duty cycle of said output signal from said modulating means, and b. amplifier means interconnecting an output electrode of said switch means to an input of said differential comparator thereby to convert said modulated b signal to said feedback voltage, Vf.
Claim 7
Dependent Claim
74 words
The system defined in claim 5 which further includes a second switch means having an input electrode thereof connected to receive a c multiplying analog signal and having a control electrode connected to receive said variable duty cycle output signal from said modulating means, whereby the output signal of said second switch means is proportional to a.c/b , whereby said system operates to simultaneously multiply and divide said a, b and c analog signals.
Claim 8
Dependent Claim
42 words
The system defined in claim 3 wherein said modulating means includes a voltage-to-duty cycle converter electrically coupled to the output of said comparing means to generate said variable duty cycle output signal which is proportional to the amplitude of said error signal.
Claim 9
Dependent Claim
57 words
The system defined in claim 7 herein said voltage-to-duty cycle converter includes a differential comparator for receiving said error signal at one input thereof and for receiving a triangular wave clock pulse at the other input thereof for switching the output of said last named differential comparator at a duty cycle proportional to the amplitude of a/b.
Claim 10
Dependent Claim
103 words
The system defined in claim 8 wherein said means in said feedback portion for modulating said b analog signal includes: a. switch means having an input electrode connected to receive said b analog signal and a control electrode connected to receive said variable duty cycle output signal from said modulating means, whereby said b analog signal is modulated in accordance with the duty cycle of said output signal from said modulating means, and b. amplifier means interconnecting an output electrode of said switch means to an input of said differential comparator thereby to convert said modulated b signal to said feedback voltage, Vf.
Claim 11
Dependent Claim
73 words
The system defined in claim 9 which further includes a second switch means having an input electrode thereof connected to receive a c multiplying analog signal and having a control electrode connected to receive said variable duty cycle output signal from said modulating means, hereby the output signal of said second switch means is proportional to a.c/b, and said system operates to simultaneously multiply and divide said a, b and c analog signals.
Claim 12
Dependent Claim
80 words
The system defined in claim 10 wherein said integrating means includes an integrator and low pass filter interconnecting the output of said first named differential comparator and one input of said second named differential comparator foR integrating the differential output signal at the output of said first named comparator and providing reset action in the generation of said error signal, said integrator and low pass filter further providing a high DC gain and a high frequency stability for said system.
Claim 13
Dependent Claim
168 words
The system defined in claim 11 which further includes: a. a first input isolation amplifier connected between said first named differential comparator and an a analog input voltage terminal for summing said a analog input voltage with a first offset voltage, b. a second isolation amplifier interconnected between the input electrode of said first named switch means and a b analog input terminal, and said b analog signal being summed at the input of said second isolation amplifier with a second offset voltage, and c. a third isolation amplifier interconnected between the input electrode of said second named switch means and a c analog voltage input terminal, hereby said c analog signal may be summed with a third offset voltage at the input of said third isolation amplifier, whereby the ranges of currents and voltages at the outputs of said output stage may be varied in accordance with said first, second and third offset voltages which are summed with said a, b and c analog input signals, respectively.
Claim 14
Dependent Claim
77 words
The system defined in claim 12 wherein said first and second switch means are field-effect transistors each having source, gate and drain electrodes, with the gate electrodes thereof interconnected through first and second blocking diodes, respectively, to the output of said voltage-to-duty cycle converter, whereby said first and second blocking diodes unidirectionally pass said variable duty cycle output signal to the respective gate electrodes of said first and second field-effect transistors to control the signal modulation therein.
Claim 15
Independent Claim
207 words
A system for dividing a first analog signal by a second analog signal and for multiplying their quotient by a third analog signal, said system including, in combination: a. means for receiving a first analog signal, b. means connected to said receiving means for comparing said first analog signal with a feedback signal and for generating from the comparison an error signal which is dependent upon variations in said first analog or feedback signals, c. first conversion means coupled to said error signal generating means for pulse modulating said error signal and producing a variable duty cycle output signal proportional thereto, and d. feedback means connected to the output of said first conversion means and including second conversion means connected to receive both said variable duty cycle output signal and said second analog signal and responsive thereto to generate said a feedback signal, whereby said error signal continuously forces said feedback signal toward said first analog signal toward and forces the duty cycle of the output signal of said first conversion means to be proportional to a/b, and e. means for modulating said third analog signal by said variable duty cycle signal to produce an output signal proportional to said quotient multiplied by said third analog signal.
Claim 16
Independent Claim
207 words
A system for dividing a first analog signal by a second analog signal and for multiplying their quotient by a third analog signal, said system including, in combination: a. means for receiving a first analog signal, b. means connected to said receiving means for comparing said first analog signal with a feedback signal and for generating from the comparison an error signal which is dependent upon variations in said first analog or feedback signals, c. first conversion means coupled to said error signal generating means for pulse modulating said error signal and producing a variable duty cycle output signal proportional thereto, and d. feedback means connected to the output of said first conversion means and including second conversion means connected to receive both said variable duty cycle output signal and said second analog signal and responsive thereto to generate said a feedback signal, whereby said error signal continuously forces said feedback signal toward said first analog signal toward and forces the duty cycle of the output signal of said first conversion means to be proportional to a/b, and e. means for modulating said third analog signal by said variable duty cycle signal to produce an output signal proportional to said quotient multiplied by said third analog signal.
Claim 17
Dependent Claim
51 words
The system defined in claim 14 wherein said error signal generating means includes comparator means connected to both said receiving means and to said second conversion means for comparing said feedback signal and said first analog signal and for generating an output signal representing the difference between the latter two signals.
Claim 18
Dependent Claim
143 words
The system defined in claim 15 wherein a. said error signal generating means further includes an integrating amplifier coupled to the output of said comparator means for providing reset action and a continuously varying output error signal when said first analog signal and said feedback signal are not equal to zero, said integrating amplifier also providing a high D.C. gain and a high frequency stability for said system and b. said first conVersion means includes differential comparator means having a first input thereof connected to receive the integrated error signal from said integrating amplifier and having a second input thereof connected to receiving a triangular waveform clock signal, whereby said differential comparator means is switched to provide a pulse width modulated output signal having a varying duty cycle determined by relative levels of said integrated error signal and said triangular waveform clock signal.
Claim 19
Dependent Claim
115 words
The system defined in claim 16 wherein said second conversion means includes: a. switching means having one input thereof connected to receive said variable duty cycle output signal from said first conversion means and having a second input thereof connected to receive said second analog signal, whereby said second analog signal is modulated in accordance with the duty cycle of said output signal from said first conversion means, and b. said second conversion means further includes amplifier means interconnecting the output of said stitching means to an input of said comparator means for continuously driving the signal output voltage of said comparator means towards zero during variations of said first and second analog input signals.
Claim 20
Dependent Claim
53 words
The system defined in claim 17 wherein said means for modulating said third analog input signal comprises a second switching means having one input thereof connected to receive said variable duty cycle output signal from said first conversion means and a second input thereof connected to receive a said third analog input signal.
Claim 21
Dependent Claim
50 words
The system defined in claim 18 which further includes amplifier and filter means connected to the output of said second switching means for amplifying and filtering the modulated output signal of said second switching means and providing a high gain and the required filtering for the output of said system.
Claim 22
Dependent Claim
48 words
The system defined in claim 19 which further includes an output bias and current driver stage connected to output of said amplifier and filter means and providing a desired range of output currents and voltages suitable for driving transducer type final control elements in a process control system.
Claim 23
Dependent Claim
16 words
The system defined in claim 20 herein said first and second switching means are field-effect transistors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-06-04 | 1976-12-04 | 1977-06-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-06-04 | 1980-12-04 | 1981-06-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-06-04 | 1984-12-04 | 1985-06-05 | $7700.00 | Window Closed / Lapsed |