Electronic data processing system

Claim 2

A non-programmable data storage and retrieval apparatus for storing and retrieving information therein on a real time basis by means of direct switch actuation, said apparatus comprising: a. switch-type input means for introducing a plurality of informational characters into said apparatus and where said characters are unrestricted to format by apparatus parameters, b. translation means operatively connected to said input means for converting such informational characters into a sector of informational data bits, c. a data register member having a plurality of data register elements and being operatively connected to said translation means for receiving said sector of data bits, said number of data register elements being at least equal to the number of data bits in said sector, d. a data storage device operatively connected to said data register member and capable of having a first sector type of informational data bits recorded thereon and a second sector type of informational data bits recorded thereon, e. said data register member being operatively interposed between said data storage device and translation means to receive informational data bits from said translation means for ultimate delivery to said data storage device and to receive data bits from said data storage device to thereby enable both read and write operations, f. sequencing means operatively connected to said data storage device to perform read-write sequencing and to control the mode of operation with respect to said data storage device, g. and switch means operatively connected to said sequencing means and being operable to control said mode of operation.

Claim 3

The data processing apparatus of claim 1 further characterized in that the apparatus includes means for introducing clock pulses to said read-write sequencing means to control same on a clock time basis.

Claim 4

The data processing apparatus of claim 1 further characterized in that the apparatus includes means for introducing clock pulses to said read-write sequencing means to control same on a clock time basis, means for adding shift pulses to said data register means and gating means operable to permit introduction of said shift pulses to said data register means to enable a recirculation of the informational data bits therein on a clock time basis.

Claim 5

The data processing apparatus of claim 1 further characterized in that the apparatus is provided with counter means operatively connected to said read-write sequencing means and to said data register member to recognize and distinguish between said first sector type and said second sector type.

Claim 6

The data processing apparatus of claim 1 further characterized in that the apparatus is provided with counter means operatively connected to said read-write sequencing means and to said data register member to recognize and distinguish between said first sector type and said second sector type, and comparison means operatively associated with said last named means to compare each first sector type in said data storage device with the informational characters introduced into said apparatus.

Claim 7

The data processing apparatus of claim 1 further characterized in that the apparatus is provided with counter means operatively connected to said read-write sequencing means and to said data register member to recognize and distinguish between said first sector type and said second sector type, a search register member operatively connected to said counter means and said data storage device for receiving sectors of informational data bits from said data storage device, said search register member also being operatively connected to said data register member to recognize informational data bits introduced into said data register member, and comparison means operatively associated with said search register member to recognize comparison when it exists.

Claim 8

The data processing apparatus of claim 1 further characterized in that the apparatus is provided with counter means operatively connected to said read-write sequencing means and to said data register member to recognize and distinguish between said first sector type and said second sector type, a comparator mechanism operatively connected to said counter means and having an operative input to said data register member, said comparator mechanism being operatively connected to said data storage device for receiving sectors of data bits and enabling comparison determinable by said data register member.

Claim 9

The data processing apparatus of claim 1 further characterized in that means is included in said translation means to generate the informational data bits in BCD format.

Claim 10

The data processing apparatus of claim 1 further characterized in that means is included in said translation means to generate the informational data bits in alpha-numeric code format.

Claim 11

The data processing apparatus of claim 1 further characterized in that the apparatus comprises display means operatively associated with said data register member for retranslating the data bits introduced in said data register member to the informational character form and visually displaying said information characters.

Claim 12

The data processing apparatus of claim 10 further characterized in that said display means comprises a plurality of individual display members, an anode driving means including a plurality of anode drivers and a cathode driving means including a plurality of cathode drivers operatively connected to said display means and said data register member, and selective register means operatively connected to said anode driving means and cathode driving means to energize selected ones of said anode and cathode drivers to thereby energize selected ones of said display members.

Claim 13

The data processing apparatus of claim 11 further characterized in that said data register member is a recirculating shift register and means operatively connected to said data register member and said selective register means to inhibit recirculation of data bits in said shift register during display of any selected individual display member.

Claim 14

The data processing apparatus of claim 10 further characterized in that said display means comprises a plurality of individual display members, an anode register member operatively connected to each of said display members, a segment decoder operatively connected to said display means and said data register member, and a display location decoder operatively connected to said anode register member and said data register member for energizing selected ones of said display members.

Claim 15

The data processing apparatus of claim 12 further characterized in that said data register member is a recirculating shift register and means is operatively connected to said data register member and said segment decoder to inhibit recirculation of data bits in said shift register during display of any selected individual display member.

Claim 16

The data processing apparatus of claim 1 further characterized in that the apparatus comprises display means operatively associated with said data register member for retranslating the data bits introduced in said data register member to the informational character form and visually displaying said informational characters, said display means comprising a plurality of individual display members, change switches operatively connected to said data register member for changing the informational data bits in only selected ones of said data register elements and changing the informational character on associated selected display members.

Claim 17

The data processing apparatus of claim 15 further characterized in that an individual change switch is operatively associated with each individual display member for editing the character displayed thereby.

Claim 18

A data processing apparatus capable of storing and retrieving information therein and performing selected arithmetic functions thereon on a real time basis by means of direct switch actuation, said apparatus comprising: a. switch-type input means for introducing a plurality of informational characters into said apparatus and where said characters are unrestricted to format by apparatus parameters, b. translation means operatively connected to said input means for converting such informational characters into a sector of informational data bits, c. a data register member having a plurality of data register elements and being operatively connected to said translation means for receiving said sector of data bits, said number of data register elements being at least equal to the number of data bits in said sector, d. switch-type means for introducing arithmetic data bits into said apparatus to perform arithmetic functions on said sector of data bits, e. conversion means operatively associated with said last named means to insure serial format of said arithmetic data bits, f. arithmetic function means operatively connected to said data register member and to said conversion means for adding or subtracting the arithmetic data bits with respect to said sector of informational data bits, g. a data storage member operatively connected to said arithmetic function means and capable of having the informational data bits recorded thereon, h. said data register member being operatively interposed between said data storage member and translation means and operating substantially at the rate of operation of said data storage device to receive informational data bits from said translation means for ultimate delivery to said data storage device and to receive data bits from said data storage device to thereby enable both read and write operations, i. and a number complement generator operatively connected to said arithmetic function means and said conversion means for energizing said conversion means to a proper state for either subtraction or addition.

Claim 19

A data processing apparatus capable of storing and retrieving information therein and performing selected arithmetic functions thereon on a real time basis by means of direct switch actuation, said apparatus comprising: a. switch-type input means for introducing a plurality of informational characters into said apparatus and where said characters are unrestricted to format by apparatus parameters, b. translation means operatively connected to said input means for converting such informational characters into a sector of informational data bits, c. a data register member having a plurality of data register elements and being operatively connected to said translation means for receiving said sector of data bits, said number of data register elements being at least equal to the number of data bits in said sector, d. switch-type means for introducing arithmetic data bits into said apparatus to perform arithmetic functions on said sector of data bits, e. conversion means operatively associated with said last named means to insure serial format of said arithmetic data bits, f. arithmetic function means operatively connected to said data register member and to said conversion means for adding or subtracting the arithmetic data bits with respect to said sector of informational data bits, g. a data storage member operatively connected to said arithmetic function means and capable of having the informational data bits recorded thereon, h. said data register member being operatively interposed between said data storage member and translation means and operating substantially at the rate of operation of said data storage device to receive informational data bits from said translation means for ultimate delivery to said data storage device and to receive data bits from said data storage device to thereby enable both read and write operations, i. and a number complement generator operatively connected to said arithmetic function means and said conversion means for energizing said conversion means to a proper state for either subtraction or addition.

Claim 20

The data processing apparatus of claim 17 further characterized in that a write enable member is operatively connected to said arithmetic function means and enables the recording of informational data bits introduced with respect thereto.

Claim 21

The apparatus of claim 17 further characterized in that an add switch and a subtract switch is operatively connected to said arithmetic function means and said write enable member and to said number complements generator to locate said arithmetic function means in a proper state for addition upon actuation of said add switch and to locate said arithmetic function means in a proper state for subtraction upon actuation of said subtract switch.

Claim 22

The apparatus of claim 18 further characterized in that an add switch and a subtract switch are operatively connected to said arithmetic function means and said write enable member and to said number complement generator to locate said arithmetic function means in a proper state for addition upon actuation of said add switch and to locate said arithmetic function means in a proper state for subtraction upon actuation of said subtract switch, said add switch and said subtract switch being operatively connected to said write enable member.

Claim 23

The data processing apparatus of claim 17 further characterized in that: a. said input means is an input having a plurality of switch mechanisms thereon to introduce information into said apparatus, b. said translation means is a diode conversion matrix, c. said data register member is a shift register, d. said means for introducing arithmetic data bits are multidecade digit switches, e. said conversion means is a parallel to serial convertor, f. said ariThmetic function means is a serial BCD adder/subtracter, g. and said number complement generator is a nines complement generator.

Claim 24

The data processing apparatus of claim 17 further characterized in that the apparatus includes means for adding clock pulses to said arithmetic function means to enable the arithmetic function to be performed on a clock time basis.

Claim 25

The data processing apparatus of claim 17 further characterized in that the apparatus includes means for adding clock pulses to said arithmetic function means to enable the arithmetic function to be performed on a clock time basis, and sector selection means for selecting the proper sector of data bits in which arithmetic functions can take place and inhibiting the performance of arithmetic functions in selected other sectors of data bits.

Claim 26

The data processing apparatus of claim 23 further characterized in that means is operatively associated with said sector selection means for inhibiting the performance of arithmetic functions in selected bit positions in said selected sectors.

Claim 29

The method of claim 25 further characterized in that the method includes the step of introducing clock pulses during the comparison operation for comparing the identification data bits with the bits of the first sectors on a clock time basis.

Claim 30

The method of claim 25 further characterized in that the method includes the continually circulating the first sector of identification bits introduced in said data register during said comparison.

Claim 31

The method of claim 25 further characterized in that the method includes the consecutively and sequentially energizing a plurality of display tubes to display the informational characters represented by said data bits introduced into said data register.

Claim 32

The method of claim 25 further characterized in that the method includes introducing a plurality of arithmetic data bits into said data register to enable the performance of selected arithmetic functions on selected ones of the second data sectors which may be introduced in said data storage member.

Claim 33

The method of claim 29 further characterized in that the method includes introducing clock pulses with respect to said data register to perform the arithmetic functions on a clock time basis.

Claim 36

The method of claim 31 further characterized in that the bits forming the plurality of sectors of indicia are logical ''''ones'''' and logical ''''zeros'''' and further that said selected digital bits is ''''zeros'''' whereby only ''''zeros'''' exist in said certain selected sector spaces.

Claim 37

The method of claim 31 further characterized in that the method includes the forming of said bits in RZ or NRZ data format for storage on a magnetic data storage element.

Claim 38

The method of claim 31 wherein said storage member has a plurality of tracks and the method is further characterized in that a plurality of sector spaces are located on each track, and said method further including examining such tracks for said selected digital bits until a sector space having only said selected digital bits is located.

Claim 41

The apparatus of claim 35 further characterized in that the bits forming said sector of indicia are logical ''''ones'''' and logical ''''zeros'''' and that said selected digital bits is ''''zeros'''' whereby only ''''zeros'''' exist in said particular selected sector spaces.

Claim 42

The apparatus of claim 35 further characterized in that said digital storage member is a magnetic data storage element of the type capable of storing RZ or NRZ data.

Claim 45

The method of claim 38 further characterized in that the method includes the locating of the sector of informational data bits by examining the storage member for the sector of identification data bits associated with the sector of informational data bits.

Claim 46

The method of claim 38 further characterized in that the sector of informational data bits has the same number of bit positions as the sector of identification data bits.

Claim 47

The method of claim 38 further characterized in that the sector of informational data bits has the same number of bit positions as the sector of identification data bits, and that the number of identification characters in a sector thereof is the same as the number of informational characters present in a sector of informational characters.

Claim 48

The method of claim 38 further characterized in that the first code of informational characters and identification characters is a numeric code having decimal digits and that the second code of identification data bits and informational data bits is a BCD code.

Claim 49

The method of claim 38 further characterized in that the first code of informational characters and identification characters is a code having decimal digits and alphabetized characters, and that the second code of identification data bits and informational data bits is a six-bit alpha-numeric code.

Claim 50

The method of claim 38 further characterized in that the method includes the examining of the storage member for an identification sector space having bits therein which initially represent all zeros characters.

Claim 51

In a data storage and retrieval apparatus for storing and retrieving information therein on a real time basis and where said apparatus includes input means for introducing a plurality of informational characters into said apparatus and where said characters are unrestricted to format by apparatus parameter, a display member for displaying said characters, and a magnetic storage member; the improvement comprising a single data register member having a plurality of data register elements for receiving data bits from said input means corresponding to said informational characters, said number of data register elements being at least equal to the number of data bits, means for recirculating the data bits generated from characters introduced by said input means in said register member to enable display of said characters on said display member, means enabling said data register member to temporarily access said magnetic storage member to permit associative searching of data bits from said magnetic storage member in said data register member to enable display of characters on said display member corresponding to the data bits from said storage member.

Claim 52

In a data storage and retrieval apparatus for storing and retrieving information therein on a real time basis and where said apparatus includes input means for introducing a plurality of informational characters into said apparatus and where said characters are unrestricted to format by apparatus parameter, a display member for displaying said characters, and a magnetic storage member; the improvement comprising a single data register member having a plurality of data register elements for receiving data bits from said input means corresponding to said informational characters, said number of data register elements being at least equal to the number of data bits, means for recirculating the data bits generated from characters introduced by said input means in said register member to enable display of said characters on said display member, means enabling said data register member to temporarily access said magnetic storage member to permit associative searching of data bits from said magnetic storage member in said data register member to enable display of characters on said display member corresponding to the data bits from said storage member.

Claim 53

The improvement in the data storage and retrieval apparatus of claim 45 further characterized in that means is operatively associated with said data register member for introducing data bits into said data register member for writing on said magnetic storage member, and means operatively associated with said last named meanS for providing operative connection between said data register member and magnetic storage member so that the last named bits in said data register member can be recorded in said magnetic storage member.

Claim 54

A data storage and retrieval apparatus for storing and retrieving information therein on a real time basis and displaying said information, said apparatus comprising: a. switch-type input means for introducing a plurality of informational characters into said apparatus and converting such informational characters into informational data bits, b. a data register member having a plurality of data register elements and being operatively connected to said input means for receiving said data bits, said number of data register elements being at least equal to the number of data bits, c. a display member operatively connected to said data register member and having a plurality of radiation active display elements for displaying characters corresponding to the data bits in said data register member, d. an individual character edit switch associated with each radiation active display element and being operatively connected to said data register member, and e. character change means for changing a character depicted on a radiation active element by actuation of the edit switch associated with said radiation active element and substantially simultaneously changing the data bits in said register member to correspond to the changed character depicted on said last-named radiation active element.

Claim 55

A data storage and retrieval apparatus for storing and retrieving information therein on a real time basis and displaying said information, said apparatus comprising: a. switch-type input means for introducing a plurality of informational characters into said apparatus and converting such informational characters into informational data bits, b. a data register member having a plurality of data register elements and being operatively connected to said input means for receiving said data bits, said number of data register elements being at least equal to the number of data bits, c. a display member operatively connected to said data register member and having a plurality of radiation active display elements for displaying characters corresponding to the data bits in said data register member, d. an individual character edit switch associated with each radiation active display element and being operatively connected to said data register member, and e. character change means for changing a character depicted on a radiation active element by actuation of the edit switch associated with said radiation active element and substantially simultaneously changing the data bits in said register member to correspond to the changed character depicted on said last-named radiation active element.

Claim 56

The data storage and retrieval apparatus of claim 47 further characterized in that a data storage member is operatively connected to said data register member and which data storage member is capable of having the data bits recorded thereon, and that the character change means also substantially simultaneously changes the data bits in the data storage member along with the changing of the bits in the register member to correspond to the changed character depicted on the radiation active element.

Claim 57

The data storage and retrieval apparatus of claim 47 further characterized in that the character change means includes a character decode circuit operatively connected to each such character edit switch and a character loading element interposed between said character decode circuit and data register member.

Claim 58

A non-programmable data storage and retrieval system for storing and retrieving information on a real time basis, said system comprising a combination electronic control and memory unit and a plurality of console units operatively connected to said control and memory unit, switch-type input means on each of said console units for introducing a plurality of informational characters into said system and converting such informational characters into informational data bits, a data register member in each of said console units and each said register member having a plurality of data register elements for receiving said data bits, said number of data register elements being at least equal to the number of data bits, a magnetic data storage member in said control and memory unit and capable of having said informational data bits from said console units recorded thereon, read-write sequencing means associated with each of said console units and being operatively connected to the data register member of each such console unit to control the mode of operation with respect to said data storage member, and multiplexing means including a gating circuit and switching means operatively connected to each of said plurality of console units enabling each of said console units to individually and simultaneously access said electronic control and memory unit and control the mode of operation thereof.

Claim 59

A non-programmable data storage and retrieval system for storing and retrieving information on a real time basis, said system comprising a combination electronic control and memory unit and a plurality of console units operatively connected to said control and memory unit, switch-type input means on each of said console units for introducing a plurality of informational characters into said system and converting such informational characters into informational data bits, a data register member in each of said console units and each said register member having a plurality of data register elements for receiving said data bits, said number of data register elements being at least equal to the number of data bits, a magnetic data storage member in said control and memory unit and capable of having said informational data bits from said console units recorded thereon, read-write sequencing means associated with each of said console units and being operatively connected to the data register member of each such console unit to control the mode of operation with respect to said data storage member, and multiplexing means including a gating circuit and switching means operatively connected to each of said plurality of console units enabling each of said console units to individually and simultaneously access said electronic control and memory unit and control the mode of operation thereof.

Claim 60

The data storage and retrieval system of claim 50 further characterized in that each said console unit includes means for introducing data from said console unit into said multiplexing means and write command signals from said console unit to enable recorDing of said data in said magnetic data storage member.

Claim 61

The data storage and retrieval system of claim 51 further characterized in that each said console unit includes an arithmetic controller and that each said console unit introduces arithmetic data into said magnetic data storage member for recording thereon.

Claim 62

The data storage and retrieval system of claim 50 further characterized in that each said console unit includes means for receiving indexing clock signals, write clock signals and read clock signals from said multiplexing means.

Claim 63

The data storage and retrieval system of claim 50 further characterized in that each said console unit includes an arithmetic controller and that each said console unit introduces into said multiplexing means data introduced in said console unit by said switch type input means, and arithmetic data generated in said console unit, each said console unit also introducing into said multiplexing means write command signals from said console unit to enable recording of any such data in said magnetic data storage member, each said console unit also receiving indexing clock signals, write clock signals and read clock signals from said multiplexing means.

Claim 66

The method of claim 55 further characterized in that the method includes recording the identification bits on a first sector space of said storage member reserved only for identification words and recording the descriptive bits on a second sector space of said storage member reserved only for descriptive words.

Claim 67

The method of claim 55 further characterized in that the method includes recording the identification bits comprising an identification word on a first sector space of said storage member in a number of first bit spaces available for each of said identification bits, selecting a second sector space on said storage member which is spaced from the first sector space by a predetermined number of sector spaces, and selecting second bit spaces in said second second sector which are advanced from the first bit spaces by a predetermined number of bit spaces, and recording the descriptive bits comprising the descriptive word in the second bit spaces of said second sector space.

Claim 68

The method of claim 55 further characterized in that the method includes recording the identification bits comprising an identification word on a first sector space of said storage member in a number of first bit spaces available for each of said identification bits, selecting a second sector space on said storage member which is spaced from the first sector space by a predetermined number of sector spaces, and selecting second bit spaces in said second sector which are advanced from the first bit spaces by a predetermined number of bit spaces, and recording the descriptive bits comprising the descriptive word in the second Bit spaces of said second sector space, the predetermined number of sector spaces being equal to the predetermined number of bit spaces.

Claim 69

The method of claim 56 further characterized in that the method includes counting the number of identification bits and determining the proper second sector space of said storage member based on said counting.

Claim 70

The method of claim 55 further characterized in that said informational bits comprise a first sector and that said descriptive bits comprise a second sector, said storage member is comprised of a plurality of tracks and a plurality of sector spaces on each of said plurality of tracks, and that only first sectors are recorded in the sector spaces of one track and that only second sectors are recorded in the sector spaces of a second of said tracks.

Claim 71

A process for recording a group of words in a magnetic memory, at least one of said words forming a locator portion and another of said words forming a descriptor portion, and retrieving such words from said memory; said method comprising serially recording bit combinations representing said locator portion in one sector space of the memory thereby defining a locator address containing only said locator portion, serially recording bit combinations representing said descriptor portion in another aspect space of the memory containing only said descriptor portion and which location of the descriptor portion is related to the locator portion in addressable manner thereby defining a descriptor address; and retrieving such words by associatively selecting the locator address of the locator portion, and directly selecting the descriptor address from the locator address.

Claim 72

A process for recording a group of words in a magnetic memory, at least one of said words forming a locator portion and another of said words forming a descriptor portion, and retrieving such words from said memory; said method comprising serially recording bit combinations representing said locator portion in one sector space of the memory thereby defining a locator address containing only said locator portion, serially recording bit combinations representing said descriptor portion in another aspect space of the memory containing only said descriptor portion and which location of the descriptor portion is related to the locator portion in addressable manner thereby defining a descriptor address; and retrieving such words by associatively selecting the locator address of the locator portion, and directly selecting the descriptor address from the locator address.

Claim 73

A non-programmable data storage and retrieval apparatus for storing and retrieving information therein on a real time basis, said apparatus comprising: a. input means for introducing a plurality of informational characters into said apparatus and converting such informational characters into sectors of informational data bits, b. a data register member having a plurality of data register elements and being operatively connected to said input means for receiving said sectors of data bits, said number of data register elements being at least equal to the number of data bits in any one sector. c. a data storage device operatively connected to said data register member and capable of having a first sector type of informational data bits recorded thereon and a second sector type of informational data bits recorded thereon, said first sector type of informational bits representing addressable information, d. comparison means operatively interposed between said data register member and data storage device to determine if any of said first sector type of informational data bits on said storage device corresponds to and is identical with a first set of informational data bits introduced by said input means, e. and redundant inhibit address means operatively connected to said data register member said comparison means and said data storage device to prevent any first sector of informational data bits from being recorded on said data storage device when an identical first sector of data bits has been recorded on and still remains on said data storage device.

Claim 74

A non-programmable data storage and retrieval apparatus for storing and retrieving information therein on a real time basis, said apparatus comprising: a. input means for introducing a plurality of informational characters into said apparatus and converting such informational characters into sectors of informational data bits, b. a data register member having a plurality of data register elements and being operatively connected to said input means for receiving said sectors of data bits, said number of data register elements being at least equal to the number of data bits in any one sector. c. a data storage device operatively connected to said data register member and capable of having a first sector type of informational data bits recorded thereon and a second sector type of informational data bits recorded thereon, said first sector type of informational bits representing addressable information, d. comparison means operatively interposed between said data register member and data storage device to determine if any of said first sector type of informational data bits on said storage device corresponds to and is identical with a first set of informational data bits introduced by said input means, e. and redundant inhibit address means operatively connected to said data register member said comparison means and said data storage device to prevent any first sector of informational data bits from being recorded on said data storage device when an identical first sector of data bits has been recorded on and still remains on said data storage device.

Claim 75

The data storage and retrieval apparatus of claim 62 further characterized in that said apparatus comprises switch means for introducing a group of characters capable of being translated into said first sector type of informational bits, and write sequencing means operatively connected to said data register member and said redundant inhibit address means for recording said first sector type of informational bits on said data storage device when an identical first sector type of informational bits does not exist on said data storage device.

Claim 76

The data storage and retrieval apparatus of claim 63 further characterized in that said redundant inhibit address means inhibits said write sequencing means from permitting recordation of said first sector type of informational bits on said data storage device when an identical first sector type of informational bits has been recorded on and still remains on said data storage device.

Claim 77

A non-programmable data storage and retrieval apparatus for storing and retrieving information therein on a real time basis, said apparatus comprising: a. input means for introducing a plurality of locator characters and descriptive characters into said apparatus, b. translation means operatively connected to said input means for converting a plurality of such locator characters corresponding to one locator word into a sector of locator character bits, and converting a plurality of such descriptive characters corresponding to one descriptive word into a sector of descriptive character bits, d. a data storage device operatively connected to said data register member and capable of having a sector of locator bits recorded thereon and a sector of descriptive bits recorded thereon, and where each word is capable of being located in a sector space, e. accumulating means operatively associated with said storage member for accumulating certain of the descriptive bits corresponding to selected characters in predetermined character positions in certain of said descriptive words, f. and means operatively connected to said last named means permitting addition to or subtraction of certain of the selected characters in said predetermined character positions to thereby change such selected characters.

Claim 78

A non-programmable data storage and retrieval apparatus for storing and retrieving information therein on a real time basis, said apparatus comprising: a. input means for introducing a plurality of locator characters and descriptive characters into said apparatus, b. translation means operatively connected to said input means for converting a plurality of such locator characters corresponding to one locator word into a sector of locator character bits, and converting a plurality of such descriptive characters corresponding to one descriptive word into a sector of descriptive character bits, d. a data storage device operatively connected to said data register member and capable of having a sector of locator bits recorded thereon and a sector of descriptive bits recorded thereon, and where each word is capable of being located in a sector space, e. accumulating means operatively associated with said storage member for accumulating certain of the descriptive bits corresponding to selected characters in predetermined character positions in certain of said descriptive words, f. and means operatively connected to said last named means permitting addition to or subtraction of certain of the selected characters in said predetermined character positions to thereby change such selected characters.

Claim 79

The data storage and retrieval apparatus of claim 65 further characterized in that said accumulating means comprises an accumulated data register member which is operatively connected to said data register member and data storage device.

Claim 80

The data storage and retrieval apparatus of claim 66 further characterized in that a storage register capable of holding arithmetic data bits is operatively connected to said accumulated data register member.

Claim 81

The data storage and retrieval apparatus of claim 65 further characterized in that a zeroing sequencer is operatively connected to said data register member and data storage device for periodically removing the accumulated descriptive bits corresponding to the selected characters in said predetermined character positions and introducing bits representing zero characters in said last named predetermined character positions.

Claim 82

The data storage and retrieval apparatus of claim 68 further characterized in that a second data register member is operatively connected to said zeroing sequencer for receiving bits in said zeroing sequencer.

Claim 83

The data storage and retrieval apparatus of claim 65 further characterized in that the descriptive bits corresponding to selected characters in said predetermined character positions represent numeric characters.

Claim 84

A data processing apparatus capable of storing and retrieving information therein on a real time basis, said apparatus comprising: a. input means for introducing a plurality of informational characters into said apparatus and converting such informational characters into sectors of informational data bits, b. a data register member having a plurality of data register elements and being operatively connected to said input means for receiving said sectors of data bits, said number of data register elements being at least equal to the number of data bits in any one sector, c. a data storage member remote from said data register member and being operatively electrically connected to said data register member for receiving and capable of having the sectors of informational data bits recorded thereon, d. clocking means for introducing clocking pulses with respect to said data register member for introducing a sector of data bits at the rate of the clocking pulses into and out of said data register member on a sector time basis and for transferring a sector of data bits at the rate of clocking pulses to said data storage member on a sector time basis , e. and early clock pulse transmitting means operatively connected to said clocking means and data register member for sending to said data register member a number of clocking pulses in one sector time which is greater than the number of data bits contained in any one sector.

Claim 85

A data processing apparatus capable of storing and retrieving information therein on a real time basis, said apparatus comprising: a. input means for introducing a plurality of informational characters into said apparatus and converting such informational characters into sectors of informational data bits, b. a data register member having a plurality of data register elements and being operatively connected to said input means for receiving said sectors of data bits, said number of data register elements being at least equal to the number of data bits in any one sector, c. a data storage member remote from said data register member and being operatively electrically connected to said data register member for receiving and capable of having the sectors of informational data bits recorded thereon, d. clocking means for introducing clocking pulses with respect to said data register member for introducing a sector of data bits at the rate of the clocking pulses into and out of said data register member on a sector time basis and for transferring a sector of data bits at the rate of clocking pulses to said data storage member on a sector time basis , e. and early clock pulse transmitting means operatively connected to said clocking means and data register member for sending to said data register member a number of clocking pulses in one sector time which is greater than the number of data bits contained in any one sector.

Claim 86

The data processing apparatus of claim 71 further characterized in that means is included in said early clocking means for reducing the number of clock pulses in a succeeding sector time by the number of clock pulses which exceeded the data bits in the last named previous sector time.

Claim 87

The data processing apparatus of claim 72 further characterized in that said early clocking means is an early clock pulse sequencer.

Claim 88

A non-programmable data storage and retrieval apparatus comprising data register member capable of receiving bits representative of characters introduced thereinto, first switch means operatively connected to said data register member for converting a sector of address type characters into a sector of address representing digital bits and introducing same into said data register member, second switch means operatively connected to said data register member, for converting a first sector of data type characters into a first data sector of data representing digital bits and introducing same into said data register member, third switch means operatively connected to said data register member for converting a second sector of data type characters into a second data sector of data representing digital bits and introducing same into said data register member, a data storage device operatively connected to said register member for receiving bits representing characters of each of said sectors, read switch means for selecting and displaying any selected one or more of said sectors, and write switch means for recording new bits in any selected one or more of said sectors in said data storage device.

Claim 89

A non-programmable data storage and retrieval apparatus comprising data register member capable of receiving bits representative of characters introduced thereinto, first switch means operatively connected to said data register member for converting a sector of address type characters into a sector of address representing digital bits and introducing same into said data register member, second switch means operatively connected to said data register member, for converting a first sector of data type characters into a first data sector of data representing digital bits and introducing same into said data register member, third switch means operatively connected to said data register member for converting a second sector of data type characters into a second data sector of data representing digital bits and introducing same into said data register member, a data storage device operatively connected to said register member for receiving bits representing characters of each of said sectors, read switch means for selecting and displaying any selected one or more of said sectors, and write switch means for recording new bits in any selected one or more of said sectors in said data storage device.

Claim 90

The data storage and retrieval apparatus of claim 74 further characterized in that initial and subsequent read sequencers are operatively associated with said data register member.

Claim 91

The data storage and retrieval apparatus of claim 74 further characterized in that initial and subsequent write sequencers are operatively associated with said data register member.

Claim 92

The data storage and retrieval apparatus of claim 74 further characterized in that said read switch means comprises a first read switch which permits reading of the sector of address type characters, a second read switch which permits reading of the first data sector, and a third read switch which permits reading of the first data sector, and a third read switch which permits reading of the second data sector.

Claim 93

The data storage and retrieval apparatus of claim 74 further characterized in that said write switch means comprises a first write switch which permits writing of the sector of address type characters onto said data register member, a second write switch which permits writing of the first data sector onto said data register member, and a third write switch which permits writing of the second data sector onto said data register member.

Claim 94

A non-programmable data storage and retrieval apparatus capable of storing and retrieving information therein and performing selected arithmetic functions thereon on a real time basis by means of direct switch actuation, said apparatus comprising: a. switch-type input means for introducing a plurality of informational characters into said apparatus and where said characters are unrestricted to format by apparatus parameters, b. a diode conversion matrix operatively connected to said input means for converting such informational characters into an address sector of informational bits in alpha-numeric code format and a data sector of informational bits in alpha-numeric code format and where the data sector provides information about the address sector, c. a recirculating data shift register member having a plurality oF multistable data register elements and being operatively connected to said diode conversion matrix for receiving said sectors of data bits, said number of data register elements being at least equal to the number of data bits in any one sector, d. clocking means for generating clock pulses, e. gating means operatively connected to said clocking means and said data shift register member for controlling introduction of said clock pulse to said data shift register member to enable a recirculation of the data bits therein on a clock time basis, f. switch-type means for introducing arithmetic data bits into said apparatus to perform arithmetic functions on the informational data bits in a data sector, g. a parallel-to-serial converter operatively associated with said last named switch-type means to insure serial format of said arithmetic data bits, h. arithmetic function means, including a serial BCD adder/subtractor, operatively connected to said data shift register member and to said parallel-to-serial convertor for adding or subtracting the arithmetic data bits with respect to the informational bits in a data sector, i. a serially addressable data storage member operatively connected to said data register member and said arithmetic function means and capable of having the informational data bits recorded thereon, j. said data register member being operatively interposed between said data storage member and diode conversion matrix and operating substantially at the rate of operation of said data storage member to receive informational data bits from said diode conversion matrix for ultimate delivery to said data storage member and to receive data bits from said data storage member to thereby enable both read and write operations, k. a number complements generator operatively connected to said arithmetic function means and said parallel-to-serial convertor for energizing said parallel-to-serial convertor to a proper state for either subtraction or addition, l. read and write sequencing means operatively connected to said data storage member and said data shift register member to perform read-write sequencing and control the mode of operation with respect to said data storage member, m. counter means operatively connected to said read-write sequencing means and to said data shift register member to recognize and distinguish between said address sectors and said data sectors, n. comparison means operatively connected to said counter means and having an operative input to said data shift register member for comparing each address sector of information introduced by said switch type input means with address sectors of information in said data storage member, o. a write enable member operatively connected to said arithmetic function means to enable recording of arithmetic data bits on said data storage member, p. an add switch and a subtract switch operatively connected to said arithmetic function means and said write enable member and to said number complements generator to locate said arithmetic function means in a proper state for addition upon actuation of said add switch and to locate said arithmetic function means in a proper state for subtraction upon actuation of said subtract switch, q. a plurality of individual display members, r. an anode driving means including a plurality of anode drivers and a cathode driving means including a plurality of cathode drivers operatively connected to said display means and said data shift register, s. an anode register member operatively connected to each of said display members and said anode driving means, t. a decoder operatively connected to said cathode driving means and said data shift register member, u. a display location decoder operatively connected to said anode register member and said data register member for energizing selected ones of said display members, v. and an individual change switch operatively associated with each inDividual display member and operatively connected to said data register member for changing the informational data bits in only selected ones of said data register elements and changing the informational character on associated selected display members to edit the character displayed thereby.

Claim 95

A non-programmable data storage and retrieval apparatus capable of storing and retrieving information therein and performing selected arithmetic functions thereon on a real time basis by means of direct switch actuation, said apparatus comprising: a. switch-type input means for introducing a plurality of informational characters into said apparatus and where said characters are unrestricted to format by apparatus parameters, b. a diode conversion matrix operatively connected to said input means for converting such informational characters into an address sector of informational bits in alpha-numeric code format and a data sector of informational bits in alpha-numeric code format and where the data sector provides information about the address sector, c. a recirculating data shift register member having a plurality oF multistable data register elements and being operatively connected to said diode conversion matrix for receiving said sectors of data bits, said number of data register elements being at least equal to the number of data bits in any one sector, d. clocking means for generating clock pulses, e. gating means operatively connected to said clocking means and said data shift register member for controlling introduction of said clock pulse to said data shift register member to enable a recirculation of the data bits therein on a clock time basis, f. switch-type means for introducing arithmetic data bits into said apparatus to perform arithmetic functions on the informational data bits in a data sector, g. a parallel-to-serial converter operatively associated with said last named switch-type means to insure serial format of said arithmetic data bits, h. arithmetic function means, including a serial BCD adder/subtractor, operatively connected to said data shift register member and to said parallel-to-serial convertor for adding or subtracting the arithmetic data bits with respect to the informational bits in a data sector, i. a serially addressable data storage member operatively connected to said data register member and said arithmetic function means and capable of having the informational data bits recorded thereon, j. said data register member being operatively interposed between said data storage member and diode conversion matrix and operating substantially at the rate of operation of said data storage member to receive informational data bits from said diode conversion matrix for ultimate delivery to said data storage member and to receive data bits from said data storage member to thereby enable both read and write operations, k. a number complements generator operatively connected to said arithmetic function means and said parallel-to-serial convertor for energizing said parallel-to-serial convertor to a proper state for either subtraction or addition, l. read and write sequencing means operatively connected to said data storage member and said data shift register member to perform read-write sequencing and control the mode of operation with respect to said data storage member, m. counter means operatively connected to said read-write sequencing means and to said data shift register member to recognize and distinguish between said address sectors and said data sectors, n. comparison means operatively connected to said counter means and having an operative input to said data shift register member for comparing each address sector of information introduced by said switch type input means with address sectors of information in said data storage member, o. a write enable member operatively connected to said arithmetic function means to enable recording of arithmetic data bits on said data storage member, p. an add switch and a subtract switch operatively connected to said arithmetic function means and said write enable member and to said number complements generator to locate said arithmetic function means in a proper state for addition upon actuation of said add switch and to locate said arithmetic function means in a proper state for subtraction upon actuation of said subtract switch, q. a plurality of individual display members, r. an anode driving means including a plurality of anode drivers and a cathode driving means including a plurality of cathode drivers operatively connected to said display means and said data shift register, s. an anode register member operatively connected to each of said display members and said anode driving means, t. a decoder operatively connected to said cathode driving means and said data shift register member, u. a display location decoder operatively connected to said anode register member and said data register member for energizing selected ones of said display members, v. and an individual change switch operatively associated with each inDividual display member and operatively connected to said data register member for changing the informational data bits in only selected ones of said data register elements and changing the informational character on associated selected display members to edit the character displayed thereby.