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US3735347A Expired / Lapsed US ⏱️ 0.0 years remaining

Change detector system

Assignee: Franklin Electric Co Inc
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Filing: 1971-11-02
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Granted: 1973-05-22
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Expires: 1991-11-02
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Abstract

Abstract This disclosure deals with a system for detecting a change in a parameter represented by an analog signal. Integrating means receives the signal during a first time period and again during a second time period. The two time periods are preferably equal in duration and are adjoining. The results of the integration during the first period is compared with that of the second period. When the two time periods are equal, the results will be equal if the parameter has not changed during the two periods. If the results are different, a change in the parameter is indicated.

Inventors

  • 👤 J Whitney
  • 👤 P Sorensen

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 12:14
CPC Classifications
G; G01; G01D; G01D1/00; G01G; G01G23/00; G01G23/18; G01G23/36; G01G23/37

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 88 words
A detecting circuit for detecting a change in the frequency of a variable frequency substantially symmetrical signal having a leading edge and a trailing edge in each cycle, comprising counting means, means connecting said signal to said counting means during one period and during another period, said counting means making a count of said leading edges during said one period and another count of said trailing edges during said other period, and detecting means connected to said counting means and responsive to a difference between said two counts.
Claim 2
Dependent Claim 88 words
A detecting circuit for detecting a change in the frequency of a variable frequency substantially symmetrical signal having a leading edge and a trailing edge in each cycle, comprising counting means, means connecting said signal to said counting means during one period and during another period, said counting means making a count of said leading edges during said one period and another count of said trailing edges during said other period, and detecting means connected to said counting means and responsive to a difference between said two counts.
Claim 3
Dependent Claim 22 words
A circuit as in claim 1, wherein said one period is initiated essentially in synchronism with the leading edge of a cycle.
Claim 4
Dependent Claim 45 words
A circuit as in claim 1, wherein said connecting means comprises time base signal generating means and gating means connected to receive at least one time base signal from said generating means for connecting said variable frequency signal to said counting means during said periods.
Claim 5
Dependent Claim 76 words
A circuit as in claim 3, wherein said counting means is an up-down counter, and said time base signal generating means provides two time base signals, one time base signal having twice the time duration as the other time base signal, said connecting means responding to said two time base signals to connect said variable frequency signal to cause said counter to count up during said one period and to count down during said other period.
Claim 6
Dependent Claim 45 words
A circuit as in claim 1, wherein said up-down counter is preset to a count of two prior to said periods, and said difference responsive means indicates when the count at the end of said other period is greater than two plus or minus one.
Claim 7
Dependent Claim 40 words
A circuit as in claim 3, wherein said time base signal is connected to clear said counting means at the beginning of said one period, and is connected to actuate said detecting means at the end of said other period.
Claim 8
Dependent Claim 106 words
A circuit for detecting a change in a symmetrical cyclically varying signal which in each cycle includes a first point and a second point that is displaced one-half cycle from said first point, comprising integrating means, means connected to said integrating means and forming first and second time periods, said integrating means being adapted to receive said signal during said first and second periods and form a first integration of said first points and a second integration of said second points, and detecting means connected to said integrating means and responsive to a difference between said first and second integrations at the end of said periods.
Claim 9
Dependent Claim 106 words
A circuit for detecting a change in a symmetrical cyclically varying signal which in each cycle includes a first point and a second point that is displaced one-half cycle from said first point, comprising integrating means, means connected to said integrating means and forming first and second time periods, said integrating means being adapted to receive said signal during said first and second periods and form a first integration of said first points and a second integration of said second points, and detecting means connected to said integrating means and responsive to a difference between said first and second integrations at the end of said periods.

References Cited (Backward Citations)

US3548183A Cited
US3582882A Cited
US3624649A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-05-21 1976-11-20 1977-05-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-05-21 1980-11-20 1981-05-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-05-21 1984-11-20 1985-05-22 $7700.00 Window Closed / Lapsed

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