Digital frequency discriminator

Claim 1

A digital frequency comparator for determining which of first and second input signals of unknown frequency has the higher frequency and the quantitative relationship therebetween, said digital frequency comparator comprising: means for generating a timing signal having a periodically varying, time dependent waveform, means connected to receive said timing signal and said first and second input signals for synchronizing a predetermined portion of each of said first and second input signals with a predetermined portion of said timing signal to produce time synchronized first and second signals, means connected tO said synchronizing means for inverting each of said time synchronized first and second signals, first logical coincidence gating circuit means connected to said synchronizing means and to said inverting means for producing first and second coincidence signals indicating respectively the existence of time coincidence between said first time synchronized signal and said inverted second time synchronized signal and between said second time synchronized signal and said inverted first time synchronized signal, bistable circuit means comprising a set input connected to receive said second coincidence signal and a reset input connected to receive said first coincidence signal, for producing a set output signal when said second coincidence signal is present and a reset output signal when said first coincidence signal is present, second logical coincidence gating circuit means connected to said bistable circuit means, said second time synchronized signal and said inverted first time synchronized signal for producing a coincidence signal indicating the existence of time coincidence among said set output signal, said second time synchronized signal and said inverted first time synchronized signal, third logical coincidence gating circuit means connected to said bistable circuit means, said first time synchronized signal and said inverted second time synchronized signal for producing a coincidence signal indicating the existence of time coincidence among said reset output signal, said first time synchronized signal and said inverted second time synchronized signal, said second logical coincidence gating circuit means or said third logical coincidence gating circuit means being rendered effective selectively to generate an associated output pulse whenever at least two successive predetermined portions of said second and first time synchronized signals respectively are received by said second and third logical coincidence gate circuits respectively, whereby the occurrence of an output pulse generated by said second or third logical coincidence gating circuit means indicates respectively that said second or first input signal is of higher frequency, and the rate at which said associated output pulses are produced by said second or third logical coincidence gate circuit means indicating the quantitative frequency difference between said first and second input signals.