Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
252 words
A frame synchronization system comprising: a source of binary information signal having a given bit rate and containing a synchronization component; first means to produce a plurality of timing signals; second means coupled to said source and said first means to examine successive bits of said information signal to recognize said synchronization component and produce a resultant output signal at each examination indicating either an insynchronization condition or an out-of-synchronization condition; third means to integrate said resultant output signal; fourth means coupled to the output of said third means responsive to the integrated output signal thereof to produce a first control signal indicating either an in-synchronization condition or an out-of synchronization condition; fifth means coupled between said second and third means and to said fourth means responsive to said first control signal to adjust the amplitude of said resultant output signal applied to said third means to enable said third means to perform a slow integration of said resultant output signal for an insynchronization condition of said first control signal and a fast integration of said resultant output signal for an out-ofsynchronization condition of said first control signal; and sixth means coupled to said first means, said second means, said third means and said fourth means to provide a second control signal for timing adjustment of said timing signals when said resultant output signal and said first control signal indicate an out-of-synchronization condition and the amplitude of the result of said fast integration of said third means has exceeded a given value.
Claim 2
Dependent Claim
252 words
A frame synchronization system comprising: a source of binary information signal having a given bit rate and containing a synchronization component; first means to produce a plurality of timing signals; second means coupled to said source and said first means to examine successive bits of said information signal to recognize said synchronization component and produce a resultant output signal at each examination indicating either an insynchronization condition or an out-of-synchronization condition; third means to integrate said resultant output signal; fourth means coupled to the output of said third means responsive to the integrated output signal thereof to produce a first control signal indicating either an in-synchronization condition or an out-of synchronization condition; fifth means coupled between said second and third means and to said fourth means responsive to said first control signal to adjust the amplitude of said resultant output signal applied to said third means to enable said third means to perform a slow integration of said resultant output signal for an insynchronization condition of said first control signal and a fast integration of said resultant output signal for an out-ofsynchronization condition of said first control signal; and sixth means coupled to said first means, said second means, said third means and said fourth means to provide a second control signal for timing adjustment of said timing signals when said resultant output signal and said first control signal indicate an out-of-synchronization condition and the amplitude of the result of said fast integration of said third means has exceeded a given value.
Claim 3
Dependent Claim
60 words
A system according to claim 1, wherein said first means further produces a local binary synchronization reference signal; and said second means includes digital comparison means coupled to said source and said first means to compare the binary condition of successive bits of said information signal and the binary condition of said reference signal and produce said resultant output signal.
Claim 4
Dependent Claim
124 words
A system according to claim 1, wherein said third means includes an operational amplifier having an inverting input, a non-inverting input and an output, a resistor coupled between said fifth means and said inverting input, a capacitor coupled between said output and said inverting input, a clamp circuit coupled between said output and said inverting input to prevent the output signal of said amplifier at any time from going below a given fixed voltage, a bias source coupled to said non-inverting input, and means coupled between said fourth means and said non-inverting input responsive to said first control signal to adjust the amplitude of the bias voltage on said non-inverting input in step with the adjustment of the amplitude of said resultant output signal.
Claim 5
Dependent Claim
14 words
A system according to claim 1, wherein said fourth means includes a bistable device.
Claim 6
Dependent Claim
65 words
A system according to claim 4, wherein said bistable device includes an operational amplifier having an inverting input, a non-inverting input and an output, a bias source coupled to said inverting input, means coupling said non-inverting input to the output of said third means, a feedback means coupled between said output and said non-inverting input, and means coupling said first control signal from said output.
Claim 7
Dependent Claim
241 words
A system according to claim 1, wherein said third means includes a first operational amplifier having an inverting input, a non-inverting input and an output, a resistor coupled between said fifth means and said inverting input of said first amplifier; a capacitor coupled between said output and inverting input of said first amplifier, a clamp circuit coupled between said output and inverting input of said first amplifier to prevent the output signal of said first amplifier at any time from going below a given fixed voltage, a first bias source coupled to said inverting input of said first amplifier, and seventh means coupled between said fourth means and said non-inverting input of said first amplifier responsive to said first control signal to adjust the amplitude of the bias voltage on said non-inverting input of said first amplifier in step with the adjustment of the amplitude of said resultant output signal; and said fourth means includes a bistable device including a second operational amplifier having an inverting input, a non-inverting input and an output, a second bias source coupled to said inverting input of said second amplifier, eighth means coupling said non-inverting input of said second amplifier to said output of said first amplifier, a feedback means coupled between said output and said non-inverting input of said second amplifier, and ninth means coupling said first control signal from said output of said second amplifier to said fifth means and said seventh means.
Claim 8
Dependent Claim
229 words
An integration system having an adjustable time constant comprising: a source of input signal to be integrated; first means to integrate said input signal; second means coupled to the output of said first means responsive to the integrated output signal to produce a control voltage; and a voltage controlled amplitude control means coupled between said source and said first means and to said second means responsive to said control voltage to adjust the amplitude of said input signal applied to said first means from said source and thereby adjust the effective time constant of said first means; said input signal being a binary signal; said control voltage being a binary signal; said voltage controlled amplitude control means responding to one binary condition of said control voltage to provide said first means with a first effective time constant and the other binary condition of said control voltage to provide said first means with a second effective time constant different than said first effective time constant; and said second means including a bistable device; said bistable device including an operational amplifier having an inverting input, a non-inverting input and an output, a bias source coupled to said inverting input, means coupling said non-inverting input to the output of said first means, a feedback means coupled between said output and said non-inverting input, and means coupling said control voltage from said output.
Claim 9
Dependent Claim
229 words
An integration system having an adjustable time constant comprising: a source of input signal to be integrated; first means to integrate said input signal; second means coupled to the output of said first means responsive to the integrated output signal to produce a control voltage; and a voltage controlled amplitude control means coupled between said source and said first means and to said second means responsive to said control voltage to adjust the amplitude of said input signal applied to said first means from said source and thereby adjust the effective time constant of said first means; said input signal being a binary signal; said control voltage being a binary signal; said voltage controlled amplitude control means responding to one binary condition of said control voltage to provide said first means with a first effective time constant and the other binary condition of said control voltage to provide said first means with a second effective time constant different than said first effective time constant; and said second means including a bistable device; said bistable device including an operational amplifier having an inverting input, a non-inverting input and an output, a bias source coupled to said inverting input, means coupling said non-inverting input to the output of said first means, a feedback means coupled between said output and said non-inverting input, and means coupling said control voltage from said output.
Claim 10
Dependent Claim
213 words
An integration system having an adjustable tiMe constant comprising: a source of input signal to be integrated; first means to integrate said input signal; second means coupled to the output of said first means responsive to the integrated output signal to produce a control voltage; and a voltage controlled amplitude control means coupled between said source and said first means and to said second means responsive to said control voltage to adjust the amplitude of said input signal applied to said first means from said source and thereby adjust the effective time constant of said first means; said first means including an operational amplifier having an inverting input, a non-inverting input and an output, a resistor coupled between said amplitude control means and said inverting input, a capacitor coupled between said output and said inverting input, a clamp circuit coupled between said output and said inverting input to prevent the output signal of said amplifier at any time from going below a given fixed voltage, a bias source coupled to said non-inverting input, and means coupled between said second means and said non-inverting input responsive to said control signal to adjust the amplitude of the bias voltage of said non-inverting input in step with the adjustment of the amplitude of said input signal.
Claim 11
Dependent Claim
213 words
An integration system having an adjustable tiMe constant comprising: a source of input signal to be integrated; first means to integrate said input signal; second means coupled to the output of said first means responsive to the integrated output signal to produce a control voltage; and a voltage controlled amplitude control means coupled between said source and said first means and to said second means responsive to said control voltage to adjust the amplitude of said input signal applied to said first means from said source and thereby adjust the effective time constant of said first means; said first means including an operational amplifier having an inverting input, a non-inverting input and an output, a resistor coupled between said amplitude control means and said inverting input, a capacitor coupled between said output and said inverting input, a clamp circuit coupled between said output and said inverting input to prevent the output signal of said amplifier at any time from going below a given fixed voltage, a bias source coupled to said non-inverting input, and means coupled between said second means and said non-inverting input responsive to said control signal to adjust the amplitude of the bias voltage of said non-inverting input in step with the adjustment of the amplitude of said input signal.
Claim 12
Dependent Claim
75 words
A system according to claim 8, wherein said input signal is a binary signal, said control voltage is a binary signal, and said voltage controlled amplitude control means responds to one binary condition of said control voltage to provide said first means with a first effective time constant and the other binary condition of said control voltage to provide said first means with a second effective time constant different than said first effective time constant.
Claim 13
Dependent Claim
14 words
A system according to claim 9, wherein said second means includes a bistable device.
Claim 14
Dependent Claim
64 words
A system according to claim 10, wherein said bistable device includes an operational amplifier having an inverting input, a non-inverting input and an output, a bias source coupled to said inverting input, means coupling said non-inverting input to the output of said first means, a feedback means coupled between said output and said non-inverting input, and means coupling said control voltage from said output.
Claim 15
Dependent Claim
326 words
An integration system having an adjustable time constant comprising: a source of input signal to be integrated; first means to integrate said input signal; second means coupled to the output of said first means responsive to the integrated output signal to produce a control voltage; and a voltage controlled amplitude control means coupled between said source and said first means and to said second means responsive to said control voltage to adjust the amplitude of said input signal applied to said first means from said source and thereby adjust the effective time constant of said first means; said first means including a first operational amplifier having an inverting input, a non-inverting input and an output, a resistor coupled between said amplitude control means and said inverting input of said first amplifier, a capacitor coupled between said output and inverting input of said first amplifier, a clamp circuit coupled between said output and inverting input of said first amplifier to prevent the output signal of said first amplifier at any time from going below a given fixed voltage, a first bias source coupled to said non-inverting input, and third means coupled between said second means and said non-inverting input of said first amplifier responsive to said control voltage to adjust the amplitude of the bias voltage on said non-inverting input of said first amplifier in step with the adjustment of the amplitude of said input signal; and said second means including a second operational amplifier having an inverting input, a non-inverting input and an output, a second biaS source coupled to said inverting input of said second amplifier, fourth means coupling said non-inverting input of said second amplifier to said output of said first amplifier, a feedback means coupled between said output of said second amplifier and said non-inverting input of said second amplifier, and fifth means coupling said control signal from said output of said second amplifier to said amplitude control means and said third means.
Claim 16
Dependent Claim
326 words
An integration system having an adjustable time constant comprising: a source of input signal to be integrated; first means to integrate said input signal; second means coupled to the output of said first means responsive to the integrated output signal to produce a control voltage; and a voltage controlled amplitude control means coupled between said source and said first means and to said second means responsive to said control voltage to adjust the amplitude of said input signal applied to said first means from said source and thereby adjust the effective time constant of said first means; said first means including a first operational amplifier having an inverting input, a non-inverting input and an output, a resistor coupled between said amplitude control means and said inverting input of said first amplifier, a capacitor coupled between said output and inverting input of said first amplifier, a clamp circuit coupled between said output and inverting input of said first amplifier to prevent the output signal of said first amplifier at any time from going below a given fixed voltage, a first bias source coupled to said non-inverting input, and third means coupled between said second means and said non-inverting input of said first amplifier responsive to said control voltage to adjust the amplitude of the bias voltage on said non-inverting input of said first amplifier in step with the adjustment of the amplitude of said input signal; and said second means including a second operational amplifier having an inverting input, a non-inverting input and an output, a second biaS source coupled to said inverting input of said second amplifier, fourth means coupling said non-inverting input of said second amplifier to said output of said first amplifier, a feedback means coupled between said output of said second amplifier and said non-inverting input of said second amplifier, and fifth means coupling said control signal from said output of said second amplifier to said amplitude control means and said third means.