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US3733475A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital pulse sequence divider

Assignee: Siemens AG
•
Filing: 1970-11-10
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Granted: 1973-05-15
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Expires: 1990-11-10
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Abstract

Abstract A computer determines the pulse intervals of an output pulse sequence which lead to optimization between two pulses of the output pulse sequence. The computer adds, subtracts and compares integral numbers and determines the pulse intervals in order to prepare the next pulse of the output pulse sequence. The computer avoids division, so that it provides a result which is free of round-off errors. A counter responds to the pulses of the input pulse sequence and releases pulses of the output pulse sequence under the control of the computer, in accordance with a or a + 1 pulses of the input pulse sequence.

Inventors

  • 👤 J Haeusler
  • 👤 W Wagnerberger

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 09:31
CPC Classifications
H; H03; H03K; H03K23/00; H03K23/64; H03K23/66; H03K23/667

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 284 words
A digital pulse sequence divider for optimal uniform distribution of an output pulse sequence n selected from an input pulse sequence N having equal intervals, said divider comprising a computing system for providing the pulse intervals for the optimal uniform distribution of the pulses of the output pulse sequence corresponding to ath or ath + 1 pulses of the input pulse sequence from given integral numbers, where N/n a + Z/N'' wherein N is the number of pulses of the input pulse sequence. n is the number of pulses of the output pulse sequence, a is the integral quotient N/n and Z/N'' is the remainder, N'' , Z and a + 1 being setting parameters previously supplied in the computing system and N being an operating input value from which n is derived, said computing system having input means for supplying the setting parameters therein, computing means connected to said input means for adding, subtracting and comparing the given integral numbers, and counter means having input means connected to said computing means for supplying the ath and ath + 1 pulses from said computing means to said counter means and other input means for supplying the input pulse sequence N to said counter means and for supplying the ath + 1 pulses to said counter means, said counter means further having output means and feedback means connecting the output means to said computing means, said counter means counting the pulses of the input pulse sequence to provide at the output means of said counter means the ath or ath + 1 pulses of the input pulse sequence as the output pulse sequence for a given starting pulse under the control of the computing system.
Claim 2
Dependent Claim 284 words
A digital pulse sequence divider for optimal uniform distribution of an output pulse sequence n selected from an input pulse sequence N having equal intervals, said divider comprising a computing system for providing the pulse intervals for the optimal uniform distribution of the pulses of the output pulse sequence corresponding to ath or ath + 1 pulses of the input pulse sequence from given integral numbers, where N/n a + Z/N'' wherein N is the number of pulses of the input pulse sequence. n is the number of pulses of the output pulse sequence, a is the integral quotient N/n and Z/N'' is the remainder, N'' , Z and a + 1 being setting parameters previously supplied in the computing system and N being an operating input value from which n is derived, said computing system having input means for supplying the setting parameters therein, computing means connected to said input means for adding, subtracting and comparing the given integral numbers, and counter means having input means connected to said computing means for supplying the ath and ath + 1 pulses from said computing means to said counter means and other input means for supplying the input pulse sequence N to said counter means and for supplying the ath + 1 pulses to said counter means, said counter means further having output means and feedback means connecting the output means to said computing means, said counter means counting the pulses of the input pulse sequence to provide at the output means of said counter means the ath or ath + 1 pulses of the input pulse sequence as the output pulse sequence for a given starting pulse under the control of the computing system.
Claim 3
Dependent Claim 67 words
A digital pulse sequence divider as claimed in claim 1, wherein the computing means of said computing system comprises a parallel adder having inputs and outputs and a plurality of memory means having inputs connected to the input means of said computing system and outputs coupled to the inputs of the parallel adder, the outputs of the parallel adder being coupled to inputs of the memory means.
Claim 4
Dependent Claim 51 words
A digital pulse sequence divider as claimed in claim 2, wherein said memory means comprises a first memory for storing a binary representation of 2N'', a second memory for storing a binary representation of the binary complement of 2Z and a third memory for storing a binary representation of N'' .
Claim 5
Dependent Claim 27 words
A digital pulse sequence divider as claimed in claim 3, wherein the output means of the computing system is connected to an output of the third memory.
Claim 6
Dependent Claim 29 words
A digital pulse sequence divider as claimed in claim 3, wherein the parallel adder stores a binary representation of the sum of N'' and the binary complement of 2Z.
Claim 7
Dependent Claim 39 words
A digital pulse sequence divider as claimed in claim 3, wherein the computing means of said computing system includes clearing means connected to the third memory and the parallel adder for clearing said third memory and said parallel adder.

References Cited (Backward Citations)

US3230352A Cited
US3283131A Cited
US3418582A Cited
US3538442A Cited
US3525039A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1976-05-14 1976-11-13 1977-05-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1980-05-14 1980-11-13 1981-05-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1984-05-14 1984-11-13 1985-05-15 $7700.00 Window Closed / Lapsed

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