US3731073A
Expired / Lapsed
US
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Programmable switching array
Assignee: AT&T Inc
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Filing: 1972-04-05
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Granted: 1973-05-01
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Expires: 1992-04-05
Abstract
Abstract A method and apparatus are disclosed for programming a fixed array of identical logic modules to generate an arbitrary combinational switching function. In particular, an array is provided which includes an ordered arrangement of columns of modules, each module having a plurality of input leads and at least one output lead. By completing electrical paths between the output leads of selected ones of the modules in a given column with the inputs of modules in the adjacent column, the array is tailored to produce the desired function. The connections are specified by an interconnection algorithm which is based on factors of the desired switching function and which is chosen to eliminate crossovers among the connecting paths.
Inventors
- 👤 P Moylan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 14:54
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/173; H03K19/177; H03K19/17736
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
155 words
Apparatus for generating signals representing desired combinational logical functions Zj, j 0, 1, 2,...,(N1-1) of one or more input logic variables X1, 0,1,...,(N2-1 a plurality of substantially identical logic modules arranged in an array having a plurality of ordered rows and a plurality of ordered columns, means for applying signals representing one or more of said input logic variables to selected modules in the first row of said array, connecting means interconnecting selected ones of said modules appearing in a given column, other than the last, to modules appearing in the immediately succeeding column, said connecting means extending from a given module in said given column only to selected ones of the set of modules in said succeeding column which set includes the module in the same row as said given module and those in consecutive adjacent rows, and output means connected to selected ones of the modules in the last column of said array.
Claim 2
Dependent Claim
155 words
Apparatus for generating signals representing desired combinational logical functions Zj, j 0, 1, 2,...,(N1-1) of one or more input logic variables X1, 0,1,...,(N2-1 a plurality of substantially identical logic modules arranged in an array having a plurality of ordered rows and a plurality of ordered columns, means for applying signals representing one or more of said input logic variables to selected modules in the first row of said array, connecting means interconnecting selected ones of said modules appearing in a given column, other than the last, to modules appearing in the immediately succeeding column, said connecting means extending from a given module in said given column only to selected ones of the set of modules in said succeeding column which set includes the module in the same row as said given module and those in consecutive adjacent rows, and output means connected to selected ones of the modules in the last column of said array.
Claim 3
Dependent Claim
48 words
Apparatus according to claim 1 wherein each of said logic modules comprises a plurality of input terminals, at least one output terminal, and circuit means for generating at said output terminal, signals representing a fixed combinational function of logic variables represented by signals applied at said input terminals.
Claim 4
Dependent Claim
65 words
Apparatus according to claim 2 wherein said means for applying comprises means for applying signals representing a given one of said input logic variables to an input terminal of a module in a respective column, said apparatus further comprising means for extending the application of said signals representing said given one of said variables to an input terminal of each module in said respective column.
Claim 5
Dependent Claim
52 words
Apparatus according to claim 3 wherein said circuit means in each of said logic modules comprises means for generating the fixed function, fij0 Xi'' + fij1 Xi, where Xi'' is the complement of Xi, and fij0 and fij1 are logical Functions of one or more of the input variables other than Xi.
Claim 6
Dependent Claim
44 words
Apparatus according to claim 4 wherein said array comprises N2 columns, and said means for applying comprises means for applying signals representing the ith input variable to an input terminal of the module in the first row of the ith column of said array.
Claim 7
Dependent Claim
27 words
Apparatus according to claim 5 wherein said circuit means further comprises means for generating a signal representing the complement of a signal representing an applied input variable.
Claim 8
Dependent Claim
48 words
Apparatus according to claim 6 wherein said output means comprises N1 ordered output leads each connected to an output terminal of a respective one of said selected modules in the last column of said array, each of said output leads corresponding to one of said desired logical functions.
Claim 9
Dependent Claim
57 words
Apparatus according to claim 7 wherein said array comprises at least N1 rows, each of said modules comprises a single output terminal, and wherein signals representing the jth one of said desired logical functions appear on the lead connected to the output terminal of the jth of said selected modules in the last column of said array.
Claim 10
Dependent Claim
83 words
Apparatus according to claim 8 wherein said connecting means comprises means for connecting the input terminals of the jth of said selected modules in the (N2- 1)th column in said array to the output terminals of those of said modules in the (N2- 2)th column which generate f(N 1)j0 and f(N 1)j1 as outputs, f(N i)j0 and f(N 1)j1 being the factors expressable in terms of X0, X1, ..., XN 2 which satisfy Zj f(N 1)j0 X''N 1 + f(N 1)j1 XN 1
Claim 11
Dependent Claim
82 words
Apparatus according to claim 9 wherein said connecting means further comprises means for connecting input terminals of the modules in the ith column to the output terminals of those of the modules in the (i-1)th column which contirbute signals representing factors f(i 1)j0 and f(1 1)j1 which are expressible in terms of X0, X1, ...,Xi 1 and which satisfy Yij f(i 1)j0 X''i + f(i 1)j1 Xi, where Yij is a function of X0, X1,...,Xi 1 contributing to the desired function Zj.
References Cited (Backward Citations)
US3400379A
Cited
US3313926A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-04-30 | 1976-10-30 | 1977-05-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-04-30 | 1980-10-30 | 1981-05-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-04-30 | 1984-10-30 | 1985-05-01 | $7700.00 | Window Closed / Lapsed |