Dynamic scanning algorithm for a buffered printer

Claim 2

A data processing system comprising: a. a central processor having a memory, b. a peripheral device control area connected to said central processor, c. said device control area having a buffer memory, d. means for transferring data and control characters from said central processor memory to said buffer memory, e. a printer connected to said peripheral device control area, said printer having a print register for storing a character to be scanned for printing, f. means responsive to said control characters for dynamically expanding the data in said buffer memory so as to form a logical memory which appears to said printer as a memory of relatively larger size than said buffer memory, and g. means responsive to said means for dynamically expanding, for entering a character representing a number into said print register indicative of a number of spAces to be printed by said printer.

Claim 3

A data processing system as set forth in claim 1 further comprising first means for transferring an address in said storage address register to said memory address register, said first means including a control character in said buffer memory.

Claim 4

A data processing system as set forth in claim 2 further comprising second means for transferring an address related to the address in said memory address register to said storage address register, said second means including a control character in said buffer memory.

Claim 5

A data processing system comprising: a. a central processor having a memory, b. a peripheral device control area connected to said central processor, c. said device control area having a buffer memory and a memory address register for accessing said buffer memory, d. means for transferring data and control characters from said central processor memory to said buffer memory, e. a peripheral utilization device, f. means responsive to said control characters for dynamically expanding the data in said buffer memory so as to form a logical memory which appears to the peripheral utilization device as a memory of relatively larger size than said buffer memory, g. said means for dynamically expanding including means for scanning successive portions of said buffer memory, and h. said means for scanning successive portions of said buffer memory including a storage address register for storing an address at which a scan of said buffer memory will begin.

Claim 6

A data processing system comprising: a. a central processor having a memory, b. a peripheral device control area connected to said central processor, c. said device control area having a buffer memory and a memory address register for accessing said buffer memory, d. means for transferring data and control characters from said central processor memory to said buffer memory, e. a peripheral utilization device, f. means responsive to said control characters for dynamically expanding the data in said buffer memory so as to form a logical memory which appears to the peripheral utilization device as a memory of relatively larger size than said buffer memory, g. said means for dynamically expanding including means for scanning successive portions of said buffer memory, and h. said means for scanning successive portions of said buffer memory including a storage address register for storing an address at which a scan of said buffer memory will begin.

Claim 7

A method as set forth in claim 4 wherein said buffer memory includes a memory address register and a storage address register, further comprising: a. storing the beginning address of a print scan in said storage address register, b. transferring said address to said memory address register to initiate a print scan, and c. transferring to said storage address register at the completion of a print line, an address related to the ending address of said memory address register.

Claim 8

In a data processing system having a central processor, a memory and a peripheral unit comprising a printer and a buffer memory, said buffer memory capable of storing a plurality of lines of print and control characters: a. means for addressing said buffer memory, b. storage means connected to said means for addressing for storing an address, c. means, responsive to said printer for establishing an address in said storage means, and d. means for transferring an address from said storage means to said means for addressing.

Claim 9

In a data processing system having a central processor, a memory and a peripheral unit comprising a printer and a buffer memory, said buffer memory capable of storing a plurality of lines of print and control characters: a. means for addressing said buffer memory, b. storage means connected to said means for addressing for storing an address, c. means, responsive to said printer for establishing an address in said storage means, and d. means for transferring an address from said storage means to said means for addressing.

Claim 10

A data processing system as set forth in claim 6 further comprising: a. a print register for storing a character to be compared with the contents of said buffer memory, and b. means for entering a character representing a number into said print register indicative of a number of spaces to be printed.

Claim 11

In a keyboard to tape data preparation system having a central control unit with a memory, an input/output bus, a traffic controller and a tape unit, said traffic controller generating addresses for said tape unit and connected thereto via said input/output bus: a. a printer having a buffer memory and a control unit therefor connected to said traffic controller via said input/output bus, b. means, responsive to an address, for holding said central control unit at the address of said printer, c. means for transferring data from said central control unit memory to said buffer memory during said holding period, and d. means for releasing said central control unit when said data has been transferred and before a print cycle has begun.

Claim 12

In a keyboard to tape data preparation system having a central control unit with a memory, an input/output bus, a traffic controller and a tape unit, said traffic controller generating addresses for said tape unit and connected thereto via said input/output bus: a. a printer having a buffer memory and a control unit therefor connected to said traffic controller via said input/output bus, b. means, responsive to an address, for holding said central control unit at the address of said printer, c. means for transferring data from said central control unit memory to said buffer memory during said holding period, and d. means for releasing said central control unit when said data has been transferred and before a print cycle has begun.

Claim 13

In a data processing system having a central processor and a peripheral printer, said peripheral printer having a buffer memory and a print register for storing a character to be printed during a scan of said buffer memory, a method for dynamically expanding data in said buffer memory to simulate to said printer a logical meMory substantially larger than said buffer memory comprising: a. providing control characters in said buffer memory, b. decoding said control characters to indicate the presence of a number of spaces, c. placing a character representative of the number of said spaces in said print register, and d. decrementing said print register to produce each space until a zero results in said print register.

Claim 14

In a data processing system having a central processor and a peripheral printer, said peripheral printer having a buffer memory and a print register for storing a character to be printed during a scan of said buffer memory, a method for dynamically expanding data in said buffer memory to simulate to said printer a logical meMory substantially larger than said buffer memory comprising: a. providing control characters in said buffer memory, b. decoding said control characters to indicate the presence of a number of spaces, c. placing a character representative of the number of said spaces in said print register, and d. decrementing said print register to produce each space until a zero results in said print register.

Claim 15

In a data processing system having a central processor and a memory, a. a printer connected to said central processor, b. said printer having a buffer memory and a print register for storing a character to be compared with the contents of said buffer memory, c. means for loading said buffer memory with data and control characters from said memory, d. scanning means for scanning the contents of said buffer memory, e. means under control of said control characters for expanding the data in said buffer memory to simulate a buffer memory of larger size by entering a number into said print register indicative of a number of spaces to be printed by said printer.

Claim 16

In a data processing system having a central processor and a memory, a. a printer connected to said central processor, b. said printer having a buffer memory and a print register for storing a character to be compared with the contents of said buffer memory, c. means for loading said buffer memory with data and control characters from said memory, d. scanning means for scanning the contents of said buffer memory, e. means under control of said control characters for expanding the data in said buffer memory to simulate a buffer memory of larger size by entering a number into said print register indicative of a number of spaces to be printed by said printer.

Claim 17

In a data processing system having a central processor with a memory and a printer having a buffer memory; means for simulating a large memory with said buffer memory comprising: a. means for transferring data and control characters from said memory to said buffer memory, b. decoding means for interpreting specified control characters stored in said buffer memory, c. a print register for storing a character to be compared with the contents of said buffer memory, and d. means, responsive to said decoding means, for entering a character representative of a number of spaces to be printed into said print register.

Claim 18

In a data processing system having a central processor with a memory and a printer having a buffer memory; means for simulating a large memory with said buffer memory comprising: a. means for transferring data and control characters from said memory to said buffer memory, b. decoding means for interpreting specified control characters stored in said buffer memory, c. a print register for storing a character to be compared with the contents of said buffer memory, and d. means, responsive to said decoding means, for entering a character representative of a number of spaces to be printed into said print register.

Claim 19

A data processing system as set forth in claim 11 further comprising: a. means for addressing said buffer memory, b. storage means connected to said means for addressing for storing an address, c. means, responsive to said printer for establishing an address in said storage means, and d. means for transferring an address from said storage means to said means for addressing.