US3728634A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Muting arrangement for communication receivers employing counters to produce control signals from interfering beat frequencies of the received signals
Assignee: Pye Electronic Products Ltd
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Filing: 1971-01-28
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Granted: 1973-04-17
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Expires: 1991-01-28
Abstract
Abstract A squelching arrangement for muting a receiver in the absence of signals received from a plurality of transmitters operating at frequencies offset from the mean frequency to which the receiver is tuned. Interfering beat frequencies of the received signals in either a communication or auxiliary channel are counted to produce a squelch control signal. This control signal then operates a gating circuit that passes the received signals if the interfering beats are of a predetermined amplitude and frequency.
Inventors
- 👤 S Watkinson
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-23 00:52
CPC Classifications
H; H03; H03G; H03G3/00; H03G3/20; H03G3/30; H03G3/34; H03G3/344
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
99 words
An arrangement for squelching a communication receiver in the absence of signals received from a plurality of transmitters operating at adjacent frequencies slightly offset from the mean operating frequency of the receiver, comprising signal input means, means for detecting said received signals coupled to said signal input means, means coupled to said detecting means for counting interfering beats between the frequencies of said received signals to produce a control signal, and gating means connected to said detecting means and controlled by said control signal to pass said received signals when said interfering beats are of predetermined amplitude and frequency.
Claim 2
Dependent Claim
99 words
An arrangement for squelching a communication receiver in the absence of signals received from a plurality of transmitters operating at adjacent frequencies slightly offset from the mean operating frequency of the receiver, comprising signal input means, means for detecting said received signals coupled to said signal input means, means coupled to said detecting means for counting interfering beats between the frequencies of said received signals to produce a control signal, and gating means connected to said detecting means and controlled by said control signal to pass said received signals when said interfering beats are of predetermined amplitude and frequency.
Claim 3
Dependent Claim
31 words
An arrangement as claimed in claim 1, wherein said detecting means are capable of demodulating a frequency modulated carrier, said control signal being derived from a discriminator in said detecting means.
Claim 4
Dependent Claim
32 words
An arrangement as claimed in claim 1, wherein said detecting means are capable of demodulating amplitude modulated signals and frequency modulated signals, said control signal being derived from said frequency modulated signals.
Claim 5
Dependent Claim
82 words
An arrangement as claimed in claim 3, wherein said detecting means comprises first and second communication channels, said first channel being capable of demodulating said amplitude modulated signals, said second channel being capable of demodulating said frequency modulated signals, said first channel operating as a main communication channel and said second channel operating as an auxiliary communication channel when amplitude modulated signals are being received and said second channel operating as a main communication channel when frequency modulated signals are being received.
Claim 6
Dependent Claim
66 words
An arrangement as claimed in claim 4, further providing gating devices in said first and second channels, the gate in said first channel being opened and the gate in said second channel being closed when frequency modulated signals are being received and the gate in said first channel being closed and the gate in said second channel being opened when amplitude modulated signals are being received.
Claim 7
Dependent Claim
25 words
An arrangement as claimed in claim 1, wherein said gating means passes signals when the frequency of said interfering beats is above its second harmonic.
Claim 8
Dependent Claim
33 words
An arrangement as claimed in claim 1, further comprising high pass filter means preceding said counting means, the corner frequency of said filtering means being above the second harmonic of said interfering beats.
Claim 9
Dependent Claim
21 words
An arrangement as claimed in claim 1, further comprising means for amplifying and limiting said interfering beats preceding said counting means.
Claim 10
Dependent Claim
16 words
An arrangement as claimed in claim 1, wherein said counting means comprises a diode pump circuit.
Claim 11
Dependent Claim
30 words
An arrangement as claimed in claim 1, further comprising a bistable circuit coupled to said counting means, the output of said counting means controlling the state of said bistable circuit.
Claim 12
Dependent Claim
16 words
An arrangement as claimed in claim 10, wherein said bistable circuit comprises a Schmitt trigger circuit.
Claim 13
Dependent Claim
23 words
An arrangement as claimed in claim 10, wherein the output of said bistable circuit is inverted and applied to control said gating means.
Claim 14
Dependent Claim
51 words
An arrangement as claimed in claim 1, wherein said gating means comprises a field effect transistor circuit having first second, and output electrodes, the path between said first and output electrodes passing said signals when the output of said counting means applied to said second electrode is below a predetermined magnitude.
Claim 15
Dependent Claim
28 words
An arrangement as claimed in claim 13, wherein said first and second electrodes are the source and gate electrodes respectively and said output electrode is the drain electrode.
Claim 16
Dependent Claim
32 words
An arrangement as claimed in claim 14, wherein a voltage is applied to said gate electrode to bias said field effect transistor so that said source-drain electrodes provide a low resistancE path.
Claim 17
Dependent Claim
55 words
An arrangement as claimed in claim 14, further comprising a diode connected to said gate electrodes, said diode operating in its conducting state when the output of said counting means is present thereby altering the voltage of the gate electrode of said field effect transistor so that said source-drain electrodes provide a high resistance path.
References Cited (Backward Citations)
US3334187A
Cited
US3482174A
Cited
US3437937A
Cited
US3543165A
Cited
US3550012A
Cited
US3569840A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-04-16 | 1976-10-16 | 1977-04-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-04-16 | 1980-10-16 | 1981-04-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-04-16 | 1984-10-16 | 1985-04-17 | $7700.00 | Window Closed / Lapsed |