US3728484A
Expired / Lapsed
US
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Digital demodulator
Assignee: MC DONNELL DOUGLAS ELECTRONICS
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Filing: 1971-07-26
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Granted: 1973-04-17
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Expires: 1991-07-26
Abstract
Abstract Accurate demodulation of a digital signal is effected by using a digital filter, a digital integrator and a digital counter to provide digital demodulation of that signal, and also by repeatedly updating the time base of the clock of that digital demodulator throughout the time that signal is being demodulated.
Inventors
- 👤 L Hawkey
- 👤 W Landers
- 👤 F Nesbitt
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 12:40
CPC Classifications
H; H04; H04Q; H04Q1/00; H04Q1/18; H04Q1/30; H04Q1/44; H04Q1/444; H04Q1/446; H04Q1/448; H04L; H04L25/00; H04L25/02; H04L25/06; H04L27/00; H04L27/10; H04L27/14; H04L27/156; H04L27/1566
Claims Analysis
Total Claims: 34
Claim 1
Independent Claim
211 words
A digital demodulator which can receive and demodulate data composed of bits that have positive-going and negative-going portions and which comprises means responsive to said data to develop a first signal during the time a digital bit is positive and to develop a second signal during the time said digital bit is negative, a source of pulses, and a digital integrator that counts pulses from said source of pulses during a predetermined length of time if said means is developing said first signal during said predetermined length of time and that counts pulses from said source of pulses during a second predetermined length of time if said means is developing said second signal during said second predetermined length of time, said digital integrator developing an output which indicates that said digital bit is a digital ''''1'''' if the total number of said pulses counted by said digital integrator during the first said and said second predetermined lengths of time falls within a pre-set range, said digital integrator developing a second output which indicates that said digital bit is a digital ''''0'''' if the total number of said pulses counted by said digital integrator during the first said and said second predetermined lengths of said time falls outside of said pre-set range.
Claim 2
Dependent Claim
211 words
A digital demodulator which can receive and demodulate data composed of bits that have positive-going and negative-going portions and which comprises means responsive to said data to develop a first signal during the time a digital bit is positive and to develop a second signal during the time said digital bit is negative, a source of pulses, and a digital integrator that counts pulses from said source of pulses during a predetermined length of time if said means is developing said first signal during said predetermined length of time and that counts pulses from said source of pulses during a second predetermined length of time if said means is developing said second signal during said second predetermined length of time, said digital integrator developing an output which indicates that said digital bit is a digital ''''1'''' if the total number of said pulses counted by said digital integrator during the first said and said second predetermined lengths of time falls within a pre-set range, said digital integrator developing a second output which indicates that said digital bit is a digital ''''0'''' if the total number of said pulses counted by said digital integrator during the first said and said second predetermined lengths of said time falls outside of said pre-set range.
Claim 3
Dependent Claim
43 words
A digital demodulator as claimed in claim 1 wherein said means is a digital filter which receives pulses having durations shorter than said bit time, and wherein said filter rejects noise and electrical transients having durations shorter than the duration of a pulse.
Claim 4
Dependent Claim
128 words
A digital demodulator as claimed in claim 1 wherein said means includes a storage element which receives said data, an inverting element which receives said data, a second storage element which receives inverted data from said inverting element, a third storage element which selectively develops the first said signal and said second signal, an intermediate element which responds to said first said signal from said third storage element and to the output of the first said storage element to apply a signal to one input of said third storage element, and a second intermediate element which responds to said second signal from said third storage element and to the output of said second storage element to apply a signal to a second input of said third storage element.
Claim 5
Dependent Claim
156 words
A digital demodulator as claimed in claim 1 wherein said means includes a storage element which receives said data, an inverting element which receives said data, a second storage element which receives inverted data from said inverting element, a third storage element which selectively develops the first said signal and said second signal, an intermediate element which responds to said first said signal from said third storage element and to the output of the first said storage element to apply a signal to one input of said third storage element, a second intermediate element which responds to said second signal from said third storage element and to the output of said second storage element to apply a signal to a second input of said third storage element, and wherein the first said and said second and said third storage elements have clock inputs that are connected together, whereby all of said storage elements are ''''clocked'''' simultaneously.
Claim 6
Dependent Claim
61 words
A digital demodulator as claimed in claim 1 wherein said digital integrator includes a counter which can count pulses to a value within said pre-set range and thereby cause the first said output to be established, and wherein said digital integrator includes a memory which will maintain said first said output even if the total of said pulses exceeds said value.
Claim 7
Dependent Claim
80 words
A digital demodulator as claimed in claim 1 wherein said digital integrator includes a gate which receives the first said signal and also receives pulses from said source of pulses and which will pass said pulses only when said first said signal is present, and wherein said digital integrator includes a second gate which receives said second signal and also receives pulses from said source of pulses and which will pass said pulses only when said second signal is present.
Claim 8
Dependent Claim
128 words
A digital demodulator as claimed in claim 1 wherein said digital integrator includes a counter which can count pulses to a value within said pre-set range and thereby cause the first said output to be established, wherein said digital integrator includes a memory which will maintain said first said output even if the total of said pulses exceeds said value, and wherein said memory includes a NAND gate with one input thereof connected to receive a signal when said counter counts pulses to said value within said pre-set range and also includes a second NAND gate which has one input thereof connected to the output of the first said NAND gate and whiCh has the output thereof connected to a second input of said first said NAND gate.
Claim 9
Dependent Claim
65 words
A digital demodulator as claimed in claim 1 wherein the first said predetermined length of time occurs during one bit time, and wherein said second predetermined length of time occurs during a contiguous bit time, whereby said digital integrator determines the digital value of said digital bit by counting pulses which precede and succeed the end of the bit time corresponding to said digital bit.
Claim 10
Dependent Claim
55 words
A digital demodulator as claimed in claim 1 wherein one of said predetermined lengths of time is shorter than one-half of a bit time but is at least as long as one-quarter of said bit time, and wherein the other of said predetermined lengths of time is longer than said one predetermined length of time.
Claim 11
Dependent Claim
74 words
A digital demodulator which can receive and demodulate digital data and which comprises means to establish a time base for said digital demodulator, second means to sense the relation of said time base for said digital demodulator to the time base of said digital data, and third means to vary said time base for said digital demodulator to cause said time base to move into register with said time base of said digital data.
Claim 12
Dependent Claim
74 words
A digital demodulator which can receive and demodulate digital data and which comprises means to establish a time base for said digital demodulator, second means to sense the relation of said time base for said digital demodulator to the time base of said digital data, and third means to vary said time base for said digital demodulator to cause said time base to move into register with said time base of said digital data.
Claim 13
Dependent Claim
77 words
A digital demodulator as claimed in claim 10 wherein fourth means senses the relation of said time base for said digital demodulator to the time base of each bit of digital data but varies said time base for said digital demodulator only in response to a displacement between said time base for said digital demodulator and the time base of a bit of digital data which has a time base equal to that of said digital demodulator.
Claim 14
Dependent Claim
21 words
A digital demodulator as claimed in claim 10 wherein said first means includes a counting chain with a selectively variable modulo.
Claim 15
Dependent Claim
46 words
A digital demodulator as claimed in claim 10 wherein said first means includes a plurality of flip-flops that are connected as a counting chain, and wherein some of said flip-flops have direct-set inputs to which signals can be applied to add counts to said counting chain.
Claim 16
Dependent Claim
70 words
A digital demodulator as claimed in claim 10 wherein a source of pulses applies pulses to said second means when said digital data has a predetermined digital value, wherein said second means has a counter which counts the number of said pulses during a predetermined portion of each bit time, and wherein said second means develops a predetermined signal if the count in said counter falls within a predetermined range.
Claim 17
Dependent Claim
58 words
A digital demodulator which can receive and demodulate digital data and which comprises a digital filter, digital means that acts during the pre-keying portion of a message to place the time base of said digital demodulator in phase with the time base of said digital data, and digital means that senses the digital value of said digital data.
Claim 18
Dependent Claim
58 words
A digital demodulator which can receive and demodulate digital data and which comprises a digital filter, digital means that acts during the pre-keying portion of a message to place the time base of said digital demodulator in phase with the time base of said digital data, and digital means that senses the digital value of said digital data.
Claim 19
Dependent Claim
35 words
A digital demodulator as claimed in claim 15 wherein the first said digital means varies the time base of said digital demodulator to place it in phase with said time base of said digital data.
Claim 20
Dependent Claim
39 words
A digital demodulator as claimed in claim 15 wherein digital means repeatedly determines whether the time base of said digital demodulator is in synchronism with the time base of said digital data during the data portion of said message.
Claim 21
Dependent Claim
73 words
A digital demodulator as claimed in claim 15 wherein digital means repeatedly determines whether the time base of said digital demodulator is in synchronism with the time base of said digital data during the data portion of said message and wherein the first said digital means acts during the data portion of said message to place said time base of said digital demodulator in synchronism with said time base of said digital data.
Claim 22
Dependent Claim
56 words
A digital demodulator as claimed in claim 15 wherein digital means determines whether the time bases of said digital demodulator and of said digital data are in synchronism, and wherein said time base of said digital demodulator is varied if said time bases of said digital demodulaTor and of said digital data are not in synchronism.
Claim 23
Dependent Claim
60 words
A digital demodulator which comprises a digital filter that rejects high frequency noise and electrical transients, means to subdivide each bit of digital data into a number of short pulses, and digital means to integrate said pulses and to indicate whether a digital bit is a digital ''''1'''' or a digital ''''0'''' according to the number of pulses integrated thereby.
Claim 24
Dependent Claim
60 words
A digital demodulator which comprises a digital filter that rejects high frequency noise and electrical transients, means to subdivide each bit of digital data into a number of short pulses, and digital means to integrate said pulses and to indicate whether a digital bit is a digital ''''1'''' or a digital ''''0'''' according to the number of pulses integrated thereby.
Claim 25
Dependent Claim
39 words
A digital demodulator as claimed in claim 20 wherein some of said pulses are integrated during the positive-going portion of said digital bit, and wherein other of said pulses are integrated during the negative-going portion of said digital bit.
Claim 26
Dependent Claim
57 words
A digital demodulator as claimed in claim 20 wherein some of said pulses are integrated during one bit time, wherein other of said pulses are integrated during the next-succeeding bit time, and wherein the slope of a bit at the end of a bit time determines whether that bit was a digital ''''1'''' or a digital ''''0.''''
Claim 27
Dependent Claim
59 words
A digital demodulator comprising means to determine the polarity of digital bits, and further means sensing the application to said digital demodulator of a predetermined consecutive number of digital bits having the same polarity, said further means developing a signal indicating the receipt by said digital demodulator of said predetermined consecutive number of digital bits having the same polarity.
Claim 28
Dependent Claim
59 words
A digital demodulator comprising means to determine the polarity of digital bits, and further means sensing the application to said digital demodulator of a predetermined consecutive number of digital bits having the same polarity, said further means developing a signal indicating the receipt by said digital demodulator of said predetermined consecutive number of digital bits having the same polarity.
Claim 29
Dependent Claim
31 words
A digital demodulator as claimed in claim 23 wherein said further means includes a shift register, and wherein said further means includes gates connected to the outputs of said shift register.
Claim 30
Dependent Claim
80 words
A digital demodulator as claimed in claim 23 wherein said further means includes a counter, and wherein the number of stages in said counter is one less than said predetermined consecutive number of digital bits, and wherein said further means simultaneously responds to signals at the outputs of said counter and to a signal at the input of said counter to sense the application to said digital demodulator of said predetermined consecutive number of digital bits having the same polarity.
Claim 31
Dependent Claim
55 words
A digital demodulator as claimed in claim 23 wherein said further means can sense the application to said digital demodulator of a predetermined number of consecutive digital bits of a predetermined polarity and also can sense the application to said digital demodulator of a second predetermined number of consecutive digital bits having the opposite polarity.
Claim 32
Dependent Claim
107 words
A digital demodulator which includes a source of pulses, means to sense the polarity of digital bits applied to said digital demodulator, and an up-down counter, said up-down counter responding to pulses from said source of pulses during a predetermined portion of the time base of said digital modulator to develop a residual count which indicates whether said time base of said digital demodulator is in synchronism with the time base of a digital bit sensed by said means, said up-down counter also developing a signal which helps indicate whether said time base of said digital demodulator leads or lags said time base of said digital bit.
Claim 33
Dependent Claim
107 words
A digital demodulator which includes a source of pulses, means to sense the polarity of digital bits applied to said digital demodulator, and an up-down counter, said up-down counter responding to pulses from said source of pulses during a predetermined portion of the time base of said digital modulator to develop a residual count which indicates whether said time base of said digital demodulator is in synchronism with the time base of a digital bit sensed by said means, said up-down counter also developing a signal which helps indicate whether said time base of said digital demodulator leads or lags said time base of said digital bit.
Claim 34
Dependent Claim
83 words
A digital demodulator as claimed in claim 27 wherein a control logic circuit is connected to said means and also to said up-down counter, said control logic circuit responding to signals from said means and from said up-down counter to develop signals which indicate the magnitude and polarity of the residual count within the up-down counter, and thereby indicate the magnitude and direction of the displacement of said time base of said digital demodulator relative to said time base of said digital bit.
References Cited (Backward Citations)
No citation records indexed.
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1976-04-16 | 1976-10-16 | 1977-04-17 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1980-04-16 | 1980-10-16 | 1981-04-17 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1984-04-16 | 1984-10-16 | 1985-04-17 | $7700.00 | Window Closed / Lapsed |