Leading edge discriminator circuit

Claim 2

A leading edge discriminator circuit for use in radar target tracking comprising: a. a radar receiver circuit means for receiving radar signals, b. threshold detector circuit means coupled to said radar receiver circuit means for passing received signals which exceed a predetermined amplitude, c. a first gate generator circuit coupled to said threshold detector circuit means for generating a gate signal in response to the signal passed by said detector circuit means, d. a gate circuit having a first input, a second input and an output, e. delay circuit means coupling the output of said receiver to the first input of said gate circuit and circuit means coupling the gate signal from said gate generating circuit to the second input of said gate circuit whereby signals from said receiver will be passed by said gate circuit during the presence of a gate signal from said gate generator, f. a second gate generating circuit coupled to said first gate generating circuit for generating a gate having a width of duration equal to the expected variation in pulse interval of the target radar, g. a third gate generating circuit coupled to said first gate generating circuit for generating a gate having a width of twice the width of the gate generated by said second gate generating circuit, h. variable width gate generating means coupled to said second and third gate generating circuits and having an output coupled to said Receiver for controlling the time at which said receiver will receive signals, i. comparison circuit means coupled to said second and third gate generating circuits and to said variable width gate generating means for generating a control voltage to maintain the trailing edge of said variable width gate in the center of the output of said third gate generating circuit.

Claim 3

A leading edge discriminator circuit for use in radar target tracking comprising: a. a radar receiver circuit means for receiving radar signals, b. threshold detector circuit means coupled to said radar receiver circuit means for passing received signals which exceed a predetermined amplitude, c. a first gate generator circuit coupled to said threshold detector circuit means for generating a gate signal in response to the signal passed by said detector circuit means, d. a gate circuit having a first input, a second input and an output, e. delay circuit means coupling the output of said receiver to the first input of said gate circuit and circuit means coupling the gate signal from said gate generating circuit to the second input of said gate circuit whereby signals from said receiver will be passed by said gate circuit during the presence of a gate signal from said gate generator, f. a first multivibrator coupled to said gate generator and being triggered to synchronism with the reception of a desired target signal to produce a short positive gate of fixed width and a positive pulse, g. an ''''or'''' circuit coupled to said first multivibrator, h. a second multivibrator coupled to said ''''or'''' circuit and being responsive to the positive pulse passed by said ''''or'''' circuit to generate a fixed gate, i. a variable delay multivibrator coupled to said second multivibrator and generating a variable width gate in response to the trailing edge of the output gate from said second multivibrator so that the total time duration of said second multivibrator fixed gate plus said variable delay multivibrator variable gate is approximately equal to the period of the target radar PRF cycle, j. a third multivibrator for generating an unblanking gate that is fed to said radar receiver in response to the trailing edge of the variable gate from said variable delay multivibrator, k. a fourth multivibrator coupled to said gate generator and being triggered in synchronism with the reception of a desired target signal to generate a fixed width positive gate which is twice the width of the fixed width gate of said first multivibrator, l. an electronic switch coupled to said third and fourth multivibrators for passing the output gate of said third multivibrator when an output gate is present from said fourth multivibrator, m. memory circuit means coupled to said first multivibrator and said electronic switch and having an output coupled to said variable delay multivibrator for producing a control voltage to said variable delay multivibrator when there is a difference in the gate width generated by said first multivibrator and passed by said electronic switch.

Claim 4

A leading edge discriminator circuit for use in radar target tracking comprising: a. a radar receiver circuit means for receiving radar signals, b. threshold detector circuit means coupled to said radar receiver circuit means for passing received signals which exceed a predetermined amplitude, c. a first gate generator circuit coupled to said threshold detector circuit means for generating a gate signal in response to the signal passed by said detector circuit means, d. a gate circuit having a first input, a second input and an output, e. delay circuit means coupling the output of said receiver to the first input of said gate circuit and circuit means coupling the gate signal from said gate generating circuit to the second input of said gate circuit whereby signals from said receiver will be passed by said gate circuit during the presence of a gate signal from said gate generator, f. a first multivibrator coupled to said gate generator and being triggered to synchronism with the reception of a desired target signal to produce a short positive gate of fixed width and a positive pulse, g. an ''''or'''' circuit coupled to said first multivibrator, h. a second multivibrator coupled to said ''''or'''' circuit and being responsive to the positive pulse passed by said ''''or'''' circuit to generate a fixed gate, i. a variable delay multivibrator coupled to said second multivibrator and generating a variable width gate in response to the trailing edge of the output gate from said second multivibrator so that the total time duration of said second multivibrator fixed gate plus said variable delay multivibrator variable gate is approximately equal to the period of the target radar PRF cycle, j. a third multivibrator for generating an unblanking gate that is fed to said radar receiver in response to the trailing edge of the variable gate from said variable delay multivibrator, k. a fourth multivibrator coupled to said gate generator and being triggered in synchronism with the reception of a desired target signal to generate a fixed width positive gate which is twice the width of the fixed width gate of said first multivibrator, l. an electronic switch coupled to said third and fourth multivibrators for passing the output gate of said third multivibrator when an output gate is present from said fourth multivibrator, m. memory circuit means coupled to said first multivibrator and said electronic switch and having an output coupled to said variable delay multivibrator for producing a control voltage to said variable delay multivibrator when there is a difference in the gate width generated by said first multivibrator and passed by said electronic switch.